1、英文文献(原文)1The AT89s52 SCMThe at89s52 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash Programmable and Erasable Read Only Memory (PEROM) and 128 bytes RAM. The device is manufactured using Atmels high density nonvolatile memory technology and is compatible with the ind
2、ustry standard MCS-51 instruction set and pin out. The chip combines a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel at89s52 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications.1. Features Compatible with MCS
3、-51 Products 4K Bytes of In-System Reprogrammable Flash Memo 128 x 8-Bit Internal RAM 32 Programmable I/O Lines Two 16-Bit Timer/Counters Six Interrupt Sources Programmable Serial Channel Low Power Idle and Power Down Modes英文文献(原文)2The at89s52 provides the following standard features: 4K bytes of Fl
4、ash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, five vector two-level interrupt architecture, a full duplex serial port, and on-chip oscillator and clock circuitry. In addition, the at89s52 is designed with static logic for operation down to zero frequency and supports two software s
5、electable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.英文文献(原文)3
6、2. Pin DescriptionVCC: Supply voltage.GND: Ground.Port 0Port 0 is an 8-bit open drain bidirectional I/O port. As an output port each pin can sink eight TTL inputs. When is written to port 0 pins, the pins can be used as high impedance inputs. Port 0 may also be configured to be the multiplexed low o
7、rder address/data bus during accesses to external program and data memory. In this mode P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pull-ups are required during program verification.Port 1Por
8、t 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pull ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will sourc
9、e current (IIL) because of the internal pull ups. Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port
10、2 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups.Port 2 emits the high-order address byte during fetches from external program memory and during acces
11、ses to external data memory that uses 16-bit addresses (MOVX DPTR). In this application it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that uses 8-bit addresses (MOVX RI), Port 2 emits the contents of the P2 Special Function Register. 英文文献(原文)4Port 2 also
12、receives the high-order address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the in
13、ternal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups.Port 3 also serves the functions of various special features of the at89s52 as listed below:Port 3 also receives some control signals for Flash pro
14、gramming and verification.RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROGAddress Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG)
15、 during Flash programming.In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. Port pin alternate functionsP3.0 RXD(ser
16、ial input port)P3.1 TXD(serial output port)P3.2 int0 (external interrupt0)P3.3 int1 (external interrupt1)P3.4 t0 (timer0 external input)P3.5 t1 (timer1 external input)P3.6 WR (external data memory write strobe)P3.7 rd (external data memory read strobe)英文文献(原文)5If desired, ALE operation can be disabl
17、ed by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable is the read strobe to ext
18、ernal program memory. When the at89s52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPPExternal Access Enable, EA must be strapped to GND in order to enable the d
19、evice to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable volta
20、ge (VPP) during Flash programming, for parts that require 12-volt VPP.XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2The inverting output of the amplifier oscillator.3. Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respec
21、tively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.
22、There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.英文文献(原文)64. Idle ModeIn idle mode, the CPU puts itself
23、to sleep while all the on chip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset.It should be noted that
24、 when idle is terminated by a hard ware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibit
25、ed. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.Status of External Pins during Idle and Power down Modesmode Program memoryALE
26、 PSEN Port0 Port1 Port2 Port3idle internal 1 1 data data data DataIdle External 1 1 float Data data DataPower downInternal 0 0 Data Data Data DataPower downExternal 0 0 float data Data data英文文献(原文)75. Power down ModeIn the power down mode the oscillator is stopped, and the instruction that invokes p
27、ower down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power down mode is terminated. The only exit from power down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated b
28、efore VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.6. Program Memory Lock BitsOn the chip are three lock bits which cannot be programmed (U) or can be programmed (P) to obtain the additional features.When lock bit
29、1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is necessary that the latched value of EA be in agreement with the current logic
30、 level at that pin in order for the device to function properly.7. Programming the FlashThe at89s52 is normally shipped with the on-chip Flash memory array in the erased state (that is, contents = FFH) and ready to be programmed. The programming interface accepts either a high-voltage (12-volt) or a
31、 low-voltage (VCC) program enable signal. The low voltage programming mode provides a convenient way to program the at89s52 inside the users system, while the high-voltage programming mode is compatible with conventional third party Flash or EPROM programmers. The at89s52 is shipped with either the
32、high-voltage or low-voltage programming mode enabled. The respective top-side marking and device signature codes are listed in the following table.英文文献(原文)8The at89s52 code memory array is programmed byte-bybyte in either programming mode. To program any nonblank byte in the on-chip Flash Programmab
33、le and Erasable Read Only Memory, the entire memory must be erased using the Chip Erase Mode.Programming Algorithm: Before programming the at89s52, the address, data and control signals should be set up according to the Flash programming mode table and Figures 3 and 4. To program the at89s52, take t
34、he following steps.1. Input the desired memory location on the address lines.2. Input the appropriate data byte on the data lines.3. Activate the correct combination of control signals.4. Raise EA/VPP to 12V for the high-voltage programming mode.5. Pulse ALE/PROG once to program a byte in the Flash
35、array or the lock bits. The byte-write cycle is self-timed and typically takes no more than 1.5ms. Repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object file is reached.Data Polling: The at89s52 features Data Polling to indicate the end of a writ
36、e cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written datum on PO.7. Once the write cycle has been completed, true data are valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has bee
37、n initiated.Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY.Program Verify: If lock bits LB1 and LB2 have
38、not been programmed, the Vpp=12v Vpp=5vTop-side mark at89s52xxxxyywwat89s52xxxx-5yywwsignature (030H)=1EH(031H)=51H(032H)=FFH(030H)=1EH(031H)=51H(032H)=05H英文文献(原文)9programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verifi
39、cation of the lock bits is achieved by observing that their features are enabled.Chip Erase: the entire Flash Programmable and Erasable Read Only Memory array is erased electrically by using the proper combination of control signals and by holding ALE/PROG low for 10ms. The code array is written wit
40、h all “1”s. The chip erase operation must be executed before the code memory can be re-programmed.Reading the Signature Bytes: The signature bytes are read by the same procedure as a normal verification of locations 030H, 031H, and 032H, except that P3.6 and P3.7 must be pulled to a logic low. The v
41、alues returned are as follows.(030H) = 1EH indicates manufactured by Atmel(031H) = 51H indicates 89C51(032H) = FFH indicates 12V programming(032H) = 05H indicates 5V programmingProgramming Interface:Every code byte in the Flash array can be written and the entire array can be erased by using the app
42、ropriate combination of control signals. The write operation cycle is self timed and once initiated, will automatically time itself to completion.The Temperature Controller1. IntroductionWith the continuous improvement of the peoples standard of living, single-chip microcomputer control people is un
43、doubtedly one of the objectives pursued, it gives people the convenience cant be denied, and the digital temperature controller which is a typical example, but it is the increasingly high demands, we must work for the modern, scientific research, and life and provide better and more convenient facil
44、ities needed from the technical aspect of SCM, all toward digital control, intelligent control of the direction of development. 英文文献(原文)10The temperature controller is a temperature control device, based on user requirements set temperature and the temperature difference to achieve control, which re
45、quired users to change the purpose of the temperature. Achieve these objectives there are many ways in theory, but the industry mainly mechanical temperature controller and two Intelligent Electronic series. Modern information technology is the basis of the three information acquisition and control
46、(temperature controller technology), information transfer (ICT) and information processing (computer technology). The Temperature Controller is the forefront of cutting-edge information technology products, in particularly, the temperature controller is widely used in industrial and agricultural pro
47、duction, and life science research in areas such as increasing the number.The digital temperature controller is developed in recent years a new generation of industrial automation detection, controls temperature and versatile instrument, it adopted an advanced large-scale integrated circuits, applic
48、ation unique nonlinear calibration technology, the temperature sensor feedback to the real-time instrumentation temperature controller with preset value of the control logic quickly, the operation, ordered output control, so as to achieve the purpose of temperature stability control. The digital tem
49、perature controller with the traditional dynamic temperature controller, electronic temperature controller, compared to display high-precision temperature control performance, and seismic-related and good reliability, as well as aesthetically pleasing, cheaper, etc. It can be widely used in plastics machinery, packaging machinery, metallurgical and food machinery, refrigeration, chemicals, medical equipment industries such as temperature measurement and control. The traditional methods of temperature control is driven conventional relay contactor control, it can