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MPS_MP1470规格书.pdf

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1、 MP1470 High-Efficiency, 2A, 16V, 500kHz Synchronous, Step-Down Converter In a 6-Pin TSOT 23 MP1470 Rev. 1.02 www.MonolithicP 1 8/27/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. 2013 MPS. All Rights Reserved. The Future of Analog IC Technolog

2、yDESCRIPTION The MP1470 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with internal power MOSFETs. It offers a very compact solution to achieve a 2A continuous output current over a wide input supply range, with excellent load and line regulation. The MP1470 has synch

3、ronous-mode operation for higher efficiency over the output current-load range. Current-mode operation provides fast transient response and eases loop stabilization. Protection features include over-current protection and thermal shutdown. The MP1470 requires a minimal number of readily-available, s

4、tandard, external components and is available in a space-saving 6-pin TSOT23 package. FEATURES Wide 4.7V-to-16V Operating Input Range 163m/86m Low-RDS(ON) Internal Power MOSFETs Proprietary Switching-LossReduction Technique High-Efficiency Synchronous-Mode Operation Fixed 500kHz Switching Frequency

5、Internal AAM Power-Save Mode for High Efficiency at Light Load Internal Soft-Start Over-Current Protection and Hiccup Thermal Shutdown Output Adjustable from 0.8V Available in a 6-pin TSOT-23 package APPLICATIONS Game Consoles Digital Set-Top Boxes Flat-Panel Television and Monitors General Purposes

6、 All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page.“MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION VINR213kR140.2kR375kINU1

7、GNDMP147014VOUT2635EN FBSWBST3.3V/2AENGND505560657075808590951000.01 0.1 1 10MP1470 SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS MP1470 Rev. 1.02 www.MonolithicP 2 8/27/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. 2013 MPS. All Righ

8、ts Reserved. ORDERING INFORMATION Part Number* Package Top Marking MP1470GJ TSOT23-6 ADJ * For Tape PACKAGE REFERENCE TOP VIEW 123654MP1470BSTSWINGNDFBENMP1470ABSOLUTE MAXIMUM RATINGS (1)VIN-0.3V to 17V VSW-0.3V (-5V for 65% Connect the external BST diode from the output of voltage regulator to the

9、BST pin, as shown in Figure 7 MP1470SWCOUTL5V or 3.3VR4External BST DiodeIN4148BSTFigure 7: Optional External Bootstrap Diode For most applications, use an IN4148 for the external BST diode is IN4148, and a 1F capacitor for the BST capacitor. PC BOARD LAYOUT PCB layout is very important to achieve s

10、table operation. For best results, use the following guidelines and Figure 8 as reference. 1) Keep the connection between the input ground and GND pin as short and wide as possible. 2) Keep the connection between the input capacitor and IN pin as short and wide as possible. 3) Use short and direct f

11、eedback connections. Place the feedback resistors and compensation components as close to the chip as possible. 4) Route SW away from sensitive analog areas such as FB. C1C6C2L1R1R2R7R6 C5R4C3R5123456VINGNDVOUTC2AC3R3C1C1AC6C2C2AL1R8R1R2R7C7R3C3R6 C5R4C4R5123456VINGNDFigure 8: Sample Board LayoutMP1

12、470 SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS MP1470 Rev. 1.02 www.MonolithicP 13 8/27/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. 2013 MPS. All Rights Reserved. Design Example Below is a design example following the application

13、 guidelines for the specifications: Table 2: Design Example VIN12V VOUT3.3V IO2A The detailed application schematics are shown in Figures 9 through 13. The typical performance and circuit waveforms have been shown in the Typical Performance Characteristics section. For more device applications, plea

14、se refer to the related Evaluation Board Datasheets. MP1470 SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS MP1470 Rev. 1.02 www.MonolithicP 14 8/27/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. 2013 MPS. All Rights Reserved. TYPICAL AP

15、PLICATION CIRCUITS 25VC1 C625VGNDGNDGND GNDGNDGNDGNDENVOUTVIN100kR5NSR6C4C2ANSC2NSC3L1SWNSR340.2kR17.68kR2GNDGND GNDGND75kR75V/2A356241NSC50RR4MP1470BSTSWINGNDFBENFigure 9: 12Vin, 5V/2A 25VC1 C625VGNDGNDGND GNDGNDGNDGNDENVOUTVIN100kR5NSR6C4C2ANSC2NSC3L1SWNSR340.2kR113kR2GNDGND GNDGND75kR73.3V/2AMP14

16、70356241BSTSWINGNDFBENNSC50RR4Figure 10: 12Vin, 3.3V/2A 25VC1 C625VGNDGNDGND GNDGNDGNDGNDENVOUTVIN100kR5NSR6C4C2ANSC2NSC3L1SWNSR340.2kR119.1kR2GNDGND GNDGND100kR72.5V/2AMP1470356241BSTSWINGNDFBENNSC50RR4Figure 11: 12Vin, 2.5V/2A MP1470 SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS MP1470 Re

17、v. 1.02 www.MonolithicP 15 8/27/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. 2013 MPS. All Rights Reserved. 25VC1 C625VGNDGNDGND GNDGNDGNDGNDENVOUTVIN100kR5NSR6C4C2ANSC2NSC3L1SWNSR340.2kR132.4kR2GNDGND GNDGND120kR71.8V/2AMP1470356241BSTSWINGN

18、DFBENNSC50RR4Figure 12: 12Vin, 1.8V/2A 25VC1 C625VGNDGNDGND GNDGNDGNDGNDENVOUTVIN100kR5NSR6C4C2ANSC2NSC3L1SWNSR320.5kR141.2kR2GNDGND GNDGND249kR71.2V/2AMP1470356241BSTSWINGNDFBENNSC50RR4Figure 13: 12Vin, 1.2V/2A MP1470 SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS NOTICE: The information in

19、 this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP1470 Rev. 1.02 www

20、.MonolithicP 16 8/27/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. 2013 MPS. All Rights Reserved. PACKAGE INFORMATION TSOT23-6 FRONT VIEWNOTE:1) ALL DIMENSIONS ARE IN MILLIMETERS.2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GAT

21、E BURR.3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10 MILLIMETERS MAX.5) DRAWING CONFORMS TO JEDEC MO-193, VARIATION AB.6) DRAWING IS NOT TO SCALE.7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP MARK FROM LEFT TO RIGHT, (SEE EXAMPLE TOP MARK)TOP VIEW RECOMMENDED LAND PATTERNSEATING PLANESIDE VIEWDETAIL “A“SEE DETAIL AIAAAAPIN 1 IDSee note 7EXAMPLE TOP MARK

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