1、APPLICATIONSa71 WIDEBAND PHOTODIODE AMPLIFIERSa71 SAMPLE-AND-HOLD BUFFERSa71 CCD OUTPUT BUFFERSa71 ADC INPUT BUFFERSa71 WIDEBAND PRECISION AMPLIFIERSa71 TEST AND MEASUREMENT FRONT ENDSDESCRIPTIONThe OPA656 combines a very wideband, unity-gain stable,voltage-feedback op amp with a FET-input stage to
2、offer anultra high dynamic-range amplifier for ADC (Analog-to-DigitalConverter) buffering and transimpedance applications. Extremelylow DC errors give good precision in optical applications.The high unity-gain stable bandwidth and JFET input allowsexceptional performance in high-speed, low-noise int
3、egrators.The high input impedance and low bias current provided bythe FET input is supported by the ultra-low 7nV/Hz inputvoltage noise to achieve a very low integrated noise inwideband photodiode transimpedance applications.Broad transimpedance bandwidths are achievable given theOPA656s high 230MHz
4、 gain bandwidth product. As shownbelow, a 3dB bandwidth of 1MHz is provided even for a high1M transimpedance gain from a 47pF source capacitance.FEATURESa71 500MHz UNITY-GAIN BANDWIDTHa71 LOW INPUT BIAS CURRENT: 2pAa71 LOW OFFSET AND DRIFT: 0.25mV, 2V/Ca71 LOW DISTORTION: 74dB SFDR at 5MHza71 HIGH O
5、UTPUT CURRENT: 70mAa71 LOW INPUT VOLTAGE NOISE: 7nV/HzWideband, Unity-Gain Stable, FET-InputOPERATIONAL AMPLIFIERFrequency1M TRANSIMPEDANCE BANDWIDTH130120110100908010kHz 100kHz 1MHz 5MHzTransimpedance Gain (dB)1MHz BandwidthOPA656Wideband Photodiode Transimpedance Amplifier(47pF)Vb499k499kVO1pFOPA6
6、56SBOS196G DECEMBER 2001 REVISED NOVEMBER Copyright 2001-2008, Texas Instruments IncorporatedPlease be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of
7、this data sheet.OPA656SLEW VOLTAGEVSBW RATE NOISEDEVICE (V) (MHz) (V/S) (nV/HZ) AMPLIFIER DESCRIPTIONOPA355 +5 200 300 5.8 Unity-Gain Stable CMOSOPA655 5 400 290 6 Unity-Gain Stable FET-InputOPA657 5 1600 700 4.8 Gain of +7 Stable FET-InputOPA627 15 16 55 4.5 Unity-Gain Stable FET-InputTHS4601 15 18
8、0 100 5.4 Unity-Gain Stable FET-InputRELATED OPERATIONAL AMPLIFIER PRODUCTSPRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters
9、.All trademarks are the property of their respective OPA6562SBOS196GSPECIFIEDPACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORTPRODUCT PACKAGE-LEAD DESIGNATOR RANGE MARKING NUMBER(2)MEDIA, QUANTITYOPA656U SO-8 Surface Mount D 40C to +85C OPA656U OPA656U Rails, 100“OPA656U/2K5 Tape and Reel, 2500OPA656UB
10、 SO-8 Surface Mount D 40C to +85C OPA656UB OPA656UB Rails, 100OPA656UB/2K5 Tape and Reel, 2500OPA656N SOT23-5 DBV 40C to +85C B56 OPA656N/250 Tape and Reel, 250“OPA656N/3K Tape and Reel, 3000OPA656NB SOT23-5 DBV 40C to +85C B56 OPA656NB/250 Tape and Reel, 250OPA656NB/3K Tape and Reel, 3000NOTE: (1)
11、For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website . (2) UB and NB are high grade, while U and N are standard grade.PACKAGE/ORDERING INFORMATION(1)ELECTROSTATICDISCHARGE SENSITIVITYThis integrated circuit can be d
12、amaged by ESD. TexasInstruments recommends that all integrated circuits be handledwith appropriate precautions. Failure to observe proper han-dling and installation procedures can cause damage.ESD damage can range from subtle performance degrada-tion to complete device failure. Precision integrated
13、circuitsmay be more susceptible to damage because very smallparametric changes could cause the device not to meet itspublished specifications.ABSOLUTE MAXIMUM RATINGS(1)Supply Voltage . 6.5VInternal Power Dissipation . See Thermal CharacteristicsDifferential Input Voltage . VSInput Voltage Range VSS
14、torage Temperature Range . 65C to +125CLead Temperature . +260CJunction Temperature (TJ ) . +150CESD Rating (Human Body Model) 2000V(Machine Model) 200VNOTE: (1) Stresses above these ratings may cause permanent damage.Exposure to absolute maximum conditions for extended periods may degradedevice rel
15、iability. These are stress ratings only, and functional operation of thedevice at these or any other conditions beyond those specified is not implied.PIN CONFIGURATIONSTop View SOTop View SOT2312348765NC+VSOutputNCNCInverting InputNoninverting InputVS12354+VSInverting InputOutputVSNoninverting Input
16、B561 2 35 4Pin Orientation/Package MarkingOPA6563SBOS196GELECTRICAL CHARACTERISTICS: VS= 5VRF= 250, RL= 100, and G = +2, unless otherwise noted. Figure 1 for AC performance.OPA656U, N (Standard-Grade)TYP MIN/MAX OVER TEMPERATURE0C to 40C to MIN/ TESTPARAMETER CONDITIONS +25C +25C(1)70C(2)+85C(2)UNIT
17、S MAX LEVEL(3)AC PERFORMANCE (Figure 1)Small-Signal Bandwidth G = +1, VO= 200mVPP, RF= 0 500 MHz Typ CG = +2, VO= 200mVPP200 MHz Typ CG = +5, VO= 200mVPP59 MHz Typ CG = +10, VO= 200mVPP23 MHz Typ CGain-Bandwidth Product G +10 230 MHz Typ CBandwidth for 0.1dB flatness G = +2, VO= 200mVPP30 MHz Typ CP
18、eaking at a Gain of +1 VO500 74 dBc Typ C3rd-Harmonic RL= 200 81 dBc Typ CRL 500 100 dBc Typ CInput Voltage Noise f 100kHz 7 nV/Hz Typ CInput Current Noise f 100kHz 1.3 fA/Hz Typ CDifferential Gain G = +2, PAL, RL= 150 0.02 % Typ CDifferential Phase G = +2, PAL, RL= 150 0.05 Typ CDC PERFORMANCE(4)Op
19、en-Loop Voltage Gain (AOL)VO= 0V, RL= 100 65 60 59 58 dB Min AInput Offset Voltage VCM= 0V 0.25 1.8 2.2 2.6 mV Max AAverage Offset Voltage Drift VCM= 0V 2 12 12 12 V/CMaxAInput Bias Current VCM= 0V 2 20 1800 5000 pA Max AInput Offset Current VCM= 0V 1 10 900 2500 pA Max BINPUTMost Positive Input Vol
20、tage(5)+2.75 +2.1 +2.05 +2.0 V Min AMost Negative Input Voltage(5)4.5 4.0 3.9 3.8 V Min AMost Positive Input Voltage(6)+3.25 +2.6 +2.5 +2.4 V Min AMost Negative Input Voltage(6)4.5 4.0 3.9 3.8 V Min ACommon-Mode Rejection Ratio (CMRR) VCM= 0.5V 86 80 78 76 dB Min AInput ImpedanceDifferential 1012 |
21、0.7 | pF Typ CCommon-Mode 1012 | 2.8 | pF Typ COUTPUTVoltage Output Swing No Load 3.9 3.7 V TypRL= 1003.5 3.3 3.2 3.1 V Min ACurrent Output, Sourcing +70 50 48 46 mA Min ACurrent Output, Sinking 70 50 48 46 mA Min AClosed-Loop Output Impedance G = +1, f = 0.1MHz 0.01 Typ CPOWER SUPPLYSpecified Opera
22、ting Voltage 5 V Typ CMaximum Operating Voltage Range 6 6 6VMaxAMaximum Quiescent Current 14 16 16.2 16.3 mA Max AMinimum Quiescent Current 14 11.7 11.4 11.1 mA Min APower-Supply Rejection Ratio (+PSRR) +VS= 4.50V to 5.50V 76 72 70 68 dB Min A(PSRR) VS= 4.50V to 5.50V 62 56 54 52 dB Min ATEMPERATURE
23、 RANGESpecified Operating Range: U, N Package 40 to 85 C TypThermal Resistance, JAJunction-to-AmbientU: SO-8 125 C/W TypN: SOT23-5 150 C/W TypNOTES: (1) Junction temperature = ambient for 25C min/max specifications.(2) Junction temperature = ambient at low temperature limit: junction temperature = a
24、mbient +20C at high temperature limit for over temperature min/maxspecifications.(3) Test Levels: (A) 100% tested at 25C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation.(C) Typical value only for information.(4) Current is considered pos
25、itive out-of-node. VCMis the input common-mode voltage.(5) Tested 53dB CMRR.OPA6564SBOS196GELECTRICAL CHARACTERISTICS: VS= 5V: High Grade DC Specifications(1)RF= 250, RL= 100, and G = +2, unless otherwise noted.OPA656UB, NB (High-Grade)TYP MIN/MAX OVER TEMPERATURE0C to 40C to MIN/ TESTPARAMETER COND
26、ITIONS +25C +25C(2)70C(3)+85C(3)UNITS MAX LEVEL(4)Input Offset Voltage VCM= 0V 0.1 0.6 0.85 0.9 mV Max AInput Offset Voltage Drift VCM= 0V 2 6 6 6 V/CMaxAInput Bias Current VCM= 0V 1 5 450 1250 pA Max AInput Offset Current VCM= 0V 0.5 5 450 1250 pA Max ACommon-Mode Rejection Ratio (CMRR) VCM= 0.5V 9
27、5 88 86 84 dB Min APower-Supply Rejection Ratio (+PSRR) +VS= 4.5V to 5.5V 78 74 72 70 dB Min A(PSRR) VS= 4.5V to 5.5V 68 62 60 58 dB Min ANOTES: (1) All other specifications are the same as the standard-grade.(2) Junction temperature = ambient for 25C min/max specifications.(3) Junction temperature
28、= ambient at low temperature limit: junction temperature = ambient +20C at high temperature limit for over temperaturemin/max specifications.(4) Test Levels: (A) 100% tested at 25C. Over temperature limits by characterization and simulation.OPA6565SBOS196GTYPICAL CHARACTERISTICS: VS= 5VTA= +25C, G=
29、+2, RF = 250, RL = 100, unless otherwise noted.NONINVERTING SMALL-SIGNALFREQUENCY RESPONSE100.5 1 500100Frequency (MHz)Normalized Gain (dB)630369121518See Figure 1G = +2G = +1RF= 0G = +5G = +10VO= 200mVp-pINVERTING SMALL-SIGNALFREQUENCY RESPONSE100.5 1 500100Frequency (MHz)Normalized Gain (dB)963036
30、91215182124See Figure 2G = 2G = 1G = 5G = 10VO= 200mVp-pRF= 402NONINVERTING LARGE-SIGNALFREQUENCY RESPONSE100.5 1 500100Frequency (MHz)Gain (dB)9630369See Figure 1VO= 0.2Vp-pVO= 0.5Vp-pVO= 1Vp-pVO= 2Vp-pG = +2INVERTING LARGE-SIGNALFREQUENCY RESPONSE100.5 1 500100Frequency (MHz)Gain (dB)30369121518VO
31、= 0.5Vp-pVO= 1Vp-pVO= 2Vp-pSee Figure 2G = 1NONINVERTING PULSE RESPONSETime (10ns/div)Small-Signal Output Voltage (200mV/div)Large-Signal Output Voltage (400mV/div)0.80.60.40.200.20.40.60.81.61.20.80.400.40.81.21.6Large-Signal Right ScaleSmall-Signal Left ScaleSee Figure 1G = +2INVERTING PULSE RESPO
32、NSETime (10ns/div)Small-Signal Output Voltage (200mV/div)Large-Signal Output Voltage (400mV/div)0.80.60.40.200.20.40.60.81.61.20.80.400.40.81.21.6Large-Signal Right ScaleSmall-Signal Left ScaleSee Figure 2G = 1OPA6566SBOS196GTYPICAL CHARACTERISTICS: VS= 5V (Cont.)TA= +25C, G= +2, RF = 250, RL = 100,
33、 unless otherwise noted.HARMONIC DISTORTION vs LOAD RESISTANCE100 1kResistance ()Harmonic Distortion (dBc)6065707580859095100105110VO= 2Vp-pf = 5MHzSee Figure 12nd Harmonic3rd HarmonicHARMONIC DISTORTION vs FREQUENCY0.1 1 2010Frequency (MHz)Harmonic Distortion (dBc)50607080901001103rd Harmonic2nd Ha
34、rmonicVO= 2Vp-pRL= 200See Figure 1HARMONIC DISTORTION vs NONINVERTING GAIN110Gain (V/V)Harmonic Distortion (dBc)60708090100110VO= 2Vp-pf = 5MHzRL= 200See Figure 1, RGAdjusted2nd Harmonic3rd HarmonicHARMONIC DISTORTION vs INVERTING GAIN1 10Gain (V/V)Harmonic Distortion (dBc)60657075808590VO= 2Vp-pRF=
35、 604F = 5MHzRL= 200See Figure 2, RGand RMAdjusted2nd Harmonic3rd HarmonicHARMONIC DISTORTION vs OUTPUT VOLTAGE (5MHz)0.5 1 5Output Voltage Swing (Vp-p)Harmonic Distortion (dBc)6065707580859095100105f = 5MHzRL= 200 2nd Harmonic3rd HarmonicHARMONIC DISTORTION vs OUTPUT VOLTAGE (1MHz)0.5 1 5Output Volt
36、age Swing (Vp-p)Harmonic Distortion (dBc)707580859095100105110f = 1MHzRL= 200See Figure 12nd Harmonic3rd HarmonicOPA6567SBOS196GTYPICAL CHARACTERISTICS: VS= 5V (Cont.)TA= +25C, G= +2, RF = 250, RL = 100, unless otherwise noted.INPUT CURRENT AND VOLTAGE NOISE DENSITY10 100 1k 10k 100k 1M 10Mf (Hz)en
37、(nV/Hz)in (fA/Hz)100101Input Voltage Noise 7nV/HzInput Current Noise 1.3fA/HzCOMMON-MODE REJECTION RATIO ANDPOWER-SUPPLY REJECTION RATIO vs FREQUENCY1k 100k 1M 10M10k 100MFrequency (Hz)CMRR (dB) PSRR (dB)1101009080706050403020CMRR+PSRRPSRROPEN-LOOP GAIN AND PHASE1k100 100k 1M 10M10k 1G100MFrequency
38、(Hz)Open-Loop Gain (dB)Open-Loop Phase (30/div)706050403020100030609012015018021020 log(AOL)100k) will benefit from the lowinput noise current of a FET input op amp such as theOPA656. One transimpedance design example is shown onthe front page of the data sheet. Designs that require highbandwidth fr
39、om a large area detector will benefit from the lowinput voltage noise for the OPA656. This input voltage noiseFIGURE 2. Inverting G = 1 Specifications and Test Circuit.OPA656+5V5VVS+VS50VOVI50+0.1F+6.8F6.8FRG250RF25050 Source50 Load0.1FOPA656+5V5V+VSVSRM57.650VOVI+6.8F0.1F+6.8F0.1FRF402RG40250 Sourc
40、e50 LoadOPA65611SBOS196Gis peaked up over frequency by the diode source capaci-tance, and can, in many cases, become the limiting factor toinput sensitivity. The key elements to the design are theexpected diode capacitance (CD) with the reverse bias volt-age (VB) applied, the desired transimpedance
41、gain, RF, andthe GBP for the OPA656 (230MHz). Figure 3 shows a designfrom a 25pF source capacitance diode through a 50ktransimpedance gain. With these 3 variables set (includingthe parasitic input capacitance for the OPA656 added to CD),the feedback capacitor value (CF) may be set to control thefreq
42、uency response.If the total output noise is bandlimited to a frequency lessthan the feedback pole frequency (1/RFCF), a very simpleexpression for the equivalent input noise current can bederived as:IIkTRERECFEQ NFNFND=+ +( )22 2423Where:iEQ= Equivalent input noise current if the output noise isbandl
43、imited to F 750k. This wouldalso be the feedback-resistor value for transimpedance ap-plications (see Figure 3) where the output DC error due toinverting input bias current is on the order of that contributedby the input offset voltage. In general, except for theseextremely high impedance values, th
44、e output DC errors dueto the input bias current may be neglected.After the input offset voltage itself, the most significant termcontributing to output offset voltage is the PSRR for thenegative supply. This term is modeled as an input offsetvoltage shift due to changes in the negative power-supplyv
45、oltage (and similarly for the +PSRR). The high-grade testlimit for PSRR is 62dB. This translates into 1.59mV/V inputoffset voltage shift = 10(62/20). In the worst case, a 0.38V(7.6%) shift in the negative supply voltage will produce a0.6mV apparent input offset voltage shift. Since this iscomparable
46、 to the tested limit of 0.6mV input offset voltage,OPA65614SBOS196Ga careful control of the negative supply voltage is required.The +PSRR is tested to a minimum value of 74dB. Thistranslates into 10(74/20) = 0.2mV/V sensitivity for the inputoffset voltage to positive power supply changes.As an examp
47、le, compute the worst-case output DC error forthe transimpedance circuit of Figure 1 at 25C and then theshift over the 0C to 70C range given the following assump-tions.Negative Power Supply= 5V 0.2V with a 5mV/C worst-case shiftPositive Power Supply= +5V 0.2V with a 5mV/C worst-case shiftInitial 25C
48、 Output DC Error Band= 0.3mV (due to the PSRR = 1.59mV/V 0.2V)0.04mV (due to the +PSRR = 0.2mV/V 0.2V)0.6mV Input Offset VoltageTotal = 0.94mVThis would be the worst-case error band in volume produc-tion at 25C acceptance testing given the conditions stated.Over the temperature range of 0C to 70C, we can expectthe following worst-case shifting from initial value. A 20Cinternal junction self hea
