1、Assignment 21. Give a descriptive definition for each of the following terms.(1) Starting substrate(2) Active region: The regions between these thick SiO2 layers(3) LOCOS process: LOCal Oxidation of Silicon(1) Field oxide layer: 重 掺 杂 硅 区 上 均 生 长 一 层 厚 的 氧 化 层(2) Shallow Trench Isolation (STI): an i
2、ntegrated circuit feature which prevents electrical current leakage between adjacent semiconductor device components(3) Positive resist : a type of photoresist in which the portion of the photoresist that is exposed to light becomes soluble to the photoresist developernegative resist: a type of phot
3、oresist in which the portion of the photoresist that is exposed to light becomes insoluble to the photoresist developer(4) Sputtering: a process whereby atoms are ejected from a solid target material due to bombardment of the target by energetic particles(5) Reactive ion etching: an etching technolo
4、gy that High-energy ions from the plasma, generated under low pressure (vacuum) by an electromagnetic field, attack the wafer surface and react with it(6) Strong inversion layer: 半 导 体 表 面 的 少 数 载 流 子 浓 度 等 于 体 内 的 多 数 载 流 子 浓 度 时 , 半 导 体 表 面 形 成 的 一 种 表 面 势 近 似 为 不 变 的 数 值 ， 耗 尽 层 电 荷 及 耗 尽 层 厚 度 有
5、 极 大值 状 态 称 为 强 反 型 态 。(7) Threshold voltage of MOS transistor：the gate voltage where an inversion layer forms at the interface between the insulating layer (oxide) and the substrate (body) of the transistor2. P- type well in a 250nm technology has the doping concentration NA = 1015atoms cm-3. Find
6、the limiting value of depletion-layer width wd and the total charge Qd contained in the depletion region. Use at 300K;/26kTqmV01.7;si148.50/.FcmNnqktAiFP58.0l2 nWAsid 8716.5.07194 2814159 10.58.08.6.22 cmqqQsiAdd 3. Compute the NMOS and PMOS saturation currents ISATN and ISATP per micron of width fo
7、r a 180nm technology. Assume a channel length of 200nm, , VTN = 35OXt0.5V, VTP = -0.5V, VDD =1.8V. Use 6810/.stcms28140.350.4FtCoxox lVWI cTGSoxsatNDSAT )(2NMOS:lcn2.1064 umAlVCI cTGSoxsatNDSAT /5402.1)08.(10.8)( 66 PMOS:lcp.42014 umAlVCWI cTGSoxsatNDSAT /28.4)50.1(0.18)( 662 4. As the value of the
8、drain-source voltage is further increased, the assumption that the channel voltage is larger than the threshold all along the channel ceases to hold. This happens when VGS - V(x) VT. At that point, the induced charge is zero, and the conducting channel disappears or is pinched off. No channel exists
9、 in the vicinity of the drain region and the current ID remains constant (or saturates). Please explain why the current can keep constant instead of being zero while the conducting channel has already disappeared?Reference:1 James D. Plummer, et al., “Chapter 2 Modern CMOS Technology,” Silicon VLSI
10、Technology: Fundamentals, Practice and Modeling, Prentice Hall, 2000. (Available at our course website)当 增加到 时，漏极附近的耗尽层即在上部合拢，这种状态称为预夹断。预DSVTGSV夹断后，漏极电流 。因为这时沟道仍然存在，沟道内的电场仍能使多数载流子(电子)作0Di漂移运动，并被强电场拉向漏极。若 继续增加，使 时，耗尽层合拢部分会DS TGSDV有增加，即漏极向源极方向延伸，夹断区的电阻越来越大，但漏极电流 Di却基本上趋于饱和，Di不随 的增加而增加。因为这时夹断区电阻很大， 的增加量主要降落在夹断区电阻上，SVDS沟道电场强度增加不多，因而 Di基本不变。
