1、电子科技大学二零零八至二零零九学年第二学期期末考试,一、TO FILL YOUR ANSWERS IN THE “ ” （2 X10）,2110= GRAY ( Assumed the number system is 8-bit long )If X 10 = +91，then X twos-complement = 2，-X twos-complement = 2( Assumed the number system is 8-bit long )3. To design a “1001001” serial sequence generator by shift registers, t
2、he shift register should need ( ) bit at least.,00011111,01011011,10100101,5,4. If use the simplest state assignment method for 133 states，then need at least state variables。 5. If number A twos-complement =11111001 and B twos-complement=11010101 , calculate -A-B twos-complement, -A+B twos-complemen
3、t and indicate whether or not overflow occurs. -A-B twos-complement= , overflow: -A+B twos-complement= , overflow: 6. One state transition equation is Q*=JQ+KQ。If we use D flip-flop to complete the equation，the D input terminal of D flip-flop should be have the function D= 。,8,00110010,no,11011100,n
4、o,JQ+KQ,1A 3-input truth table is shown below. Find the minimal sum-of-products expression for the output F. 5,解： 卡诺图： BA,The output function F=AB+AC+BC,C,2To find the minimal sum-of-products expression of F for F(X1,X2,X3,X4) = (1,3,5,7,9,11,12,13,14,15), ( F is complement of F ) 5,解： 函数F的卡诺图 函数F的卡
5、诺图,三. Try to finish logical function F(W,X,Y,Z) = wxyz（3,6,7,10,11,14）by one chip of 74X138 and one 8-input nand gate .10 ,解： F(W,X,Y,Z) = WXYZ（3,6,7,10,11,14） = WXYZ+ WXYZ+ WXYZ+ WXYZ+ WXYZ+ WXYZ =Y（WX Z+ WXZ+ WXZ+ WXZ+ WXZ+ WXZ） = YWXZ（1,2,3,4,5,6）,四. 4_bit adder 74xx283s function table is shown a
6、s below. Design a combinational circuit with 4_bit input YY=(y3y2y1y0) and 6_bit output Z=(z5,z4,z1,z0) and to realize the function Z=6Y, using one chip of 74283 and none logic gates.(0Y9) 10GENERAL DESCRIPTION FOR 74XX283: The 74HC283 add two 4-bit binary words (An plus Bn) plus the incoming carry.
7、 The binary sum appears on the sum outputs (SUM1 to SUM4) and the out-going carry (COUT)according to the equation: CIN + (A1 + B1) + 2(A2 + B2) + 4(A3 + B3) + 8(A4 + B4) = SUM1 + 2SUM2 + 4SUM3+ 8SUM4+ 16COUT Where (+) = plus.,解： Z=6Y=(4+2)Y=4Y+2Y=( y3y2y1y000)+(0 y3y2y1y00)=( z5,z4,z1,z0 ),Clocked S
8、ynchronous State Machine Design 15 1. Design a clocked synchronous state machine with the state/output table shown below, using D flip-flops. Use two state variables,Q1 Q2, with the state assignment shown as follows. Write transition/output table and excitation/output table. 6,state/output table：,S
9、Q2 Q1 A 0 0 B 0 1 C 1 0 D 1 1,state assignment：,transition/output table,excitation/output table,2. The excitation/output table of a clocked synchronous state machine using D flip-flops shown as follow，Write the excitation equations and output equation. 9,excitation/output table,K-map for Z,K-map for
10、 D0,Q1Q0,K-map for D1,Q1Q0,Q1Q0,The excitation equations and output equation：D1= Q0X+ Q0XD0= Q1X+ Q1XZ= Q1Q0X+ Q1Q0X,X,X,X,六. Clocked Synchronous State Machine Analysis 15 1. Analyze the circuit of a clocked synchronous state machine shown below, write the excitation equations, output equation, tran
11、sition equations and construct a transition/output table. 10,解：output equation :MAX=ENQ1Q0the excitation equations:D0=ENQ0+ENQ0=ENQ0D1= ENQ1+ENQ0 Q1+ ENQ0 Q1transition equations:Q0*=ENQ0+ENQ0=ENQ0Q1*= ENQ1+ENQ0 Q1+ ENQ0 Q1,transition/output table:,2. The transition equations and output equitation of
12、 a clocked synchronous state machine is shown as follows. Complete the timing diagram for Q1,Q0 and Y, assuming that the machine starts in state Q1,Q0=00 and flip-flops are positive-edge-triggered. 5transition equations：Q0*=Q0A+Q1AQ1*=Q1+Q1Q0A+Q1Q0Aoutput equitation: Y=Q1Q0,2.根据转换-输出表画波形图。,解： 如图 1.建
13、立转换-输出表,七Construct a minimal state/output table OR a state diagram for a MEALY sequential machine, that will detect the following input sequences: x=0011 or 1100. If x=0011 or x=1100 is detected, then Z=1.The two input sequences may overlap one another. 10For example:,解：状态/输出表：,八.74X163 is a synchro
14、nous 4-bit binary counter with synchronous load and synchronous clear inputs, the basic function table is shown as follow. Design a modulo-10 counter, using one 74X163 and some necessary gates, and the counting sequence is 2-4-2-1BCD. Complete the design and draw a logic diagram. 10,The 2-4-2-1 BCD code table,Function table for a 74X163,解：1、根据题目要求建立计数状态转换表，确定状态转换所需控制输入及数据输入。,2、根据前一步的结果，求得控制输入及数据输入信号的产生函数。 LD_L=(QDQCQBQA) D=QD C=QC B=QB A=QA,
