1、优先权排队电路LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_ARITH.ALL;ENTITY ABC ISPORT(A,B,C:IN STD_LOGIC;Y:OUT BIT_VECTOR(2 DOWNTO 0);END ENTITY ABC;ARCHITECTURE ART OF ABC ISBEGINPROCESS(A,B,C)BEGINIF A=1 THENY=“001“; ELSIF B=1 THENY=“010“;ELSIF C=1 THENY=“100“;ELSEY=“000“;END IF;END PROCE
2、SS; END ARCHITECTURE ART; 八进制计数器LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL;ENTITY CNT8 ISPORT(CLK:IN STD_LOGIC;CLR:IN STD_LOGIC;ENA:IN STD_LOGIC;CQ:OUT INTEGER RANGE 0 TO 7;CO:OUT STD_LOGIC);END ENTITY CNT8;ARCHITECTURE ART OF CNT8 ISSIGNAL CQI:INTEGER RANGE 0 TO 7;BEGINPROCESS(CLK,CLR,ENA)ISBEGINIF(CLR=1)THEN CQI=0;ELSIF(CLKEVENT AND CLK=1)THENIF(ENA=1)THENIF(CQI=7)THENCQI=0;ELSE CQI=CQI+1;END IF;END IF;END IF;END PROCESS;PROCESS(CLK,CQI)ISBEGINIF(CLKEVENT AND CLK=1)THENIF(CQI=7)THENCO=1;ELSE CO=0;END IF;END IF;END PROCESS;CQ=CQI;END ARCHITECTURE ART;
