收藏 分享(赏)

一种新型的神经网络pid控制器设计及其fpga实现.docx

上传人:精品资料 文档编号:7773096 上传时间:2019-05-25 格式:DOCX 页数:92 大小:2.18MB
下载 相关 举报
一种新型的神经网络pid控制器设计及其fpga实现.docx_第1页
第1页 / 共92页
一种新型的神经网络pid控制器设计及其fpga实现.docx_第2页
第2页 / 共92页
一种新型的神经网络pid控制器设计及其fpga实现.docx_第3页
第3页 / 共92页
一种新型的神经网络pid控制器设计及其fpga实现.docx_第4页
第4页 / 共92页
一种新型的神经网络pid控制器设计及其fpga实现.docx_第5页
第5页 / 共92页
点击查看更多>>
资源描述

1、国内图书分类号:TP183国际图书分类号:621.38工学硕士学位论文一种新型的神经网络 PID控制器及其 FPGA实现硕士研究生:叶金芳导 师:王煜教授副 导 师:莫启良工程师黎淑芬工程师徐敬生工程师申请学位:工学硕士学科、专业:控制科学与工程所在单位:深圳研究生院答辩日期: 2007年 12月授予学位单位:哈尔滨工业大学Classified Index: TP183U.D.C: 621.38Dissertation for the Master Degree of EngineeringA NEW NEURAL NETWORK PIDCONTROLLER DESIGN ANDFPGA IM

2、PLEMENTATIONCandidate:Supervisor:Co- Supervisor:Academic Degree Applied for:Specialty:Affiliation:Date of Defence:Ye JinfangWang YuEric Mok,Winnie Lai,Wilson TsuiMaster of EngineeringControl Science and EngineeringShenzhen Graduate SchoolDecember, 2007Degree-Conferring-Institution: Harbin Institute

3、of Technology摘要为了克服传统 PID控制理论上不适用于非线性系统、多变量系统、时变系统和不确定性系统以及神经网络控制收敛速度慢、计算量大、结构不确定的弱点,我们将传统 PID控制规律和神经网络控制规律相结合,提出了一种新型的更为有效的神经网络 PID控制器。在本文中,我们首先将介绍这种神经网络 PID控制算法,包括用于计算网络输出的前向算法,用于调整连接权重值的误差反向传播学习算法和修正后的误差反传算法。并对采用该控制器的系统进行稳定性分析,给出了神经网络连接权重初值的选取方法和连接权重取初值时的等价系统。然后在 MATLAB中对线性一阶及二阶系统、非线性时不变和时变系统进行网络

4、自学习过程的仿真。仿真结果较好地验证了控制器设计的有效性。为了能将该控制器应用于实际控制系统,我们需要在硬件上对其实现。基于算法对并行性、高可靠性、高速运算的要求,我们选择 FPGA作为硬件实现工具。采用自顶向下的模块化设计方法和 VHDL语言编程及仿真工具,首先将UART、DCM、Block RAM和浮点二进制数的加法器和乘法器等各模块分别实现,再将其连接组合完成整个设计。然后对 FPGA设计进行了仿真验证并下载到FPGA开发板中进行硬件测试。所得结果和 MATLAB的计算结果进行比对,较为吻合。软件仿真和硬件实现初步验证了神经网络 PID控制器设计的正确性,故本设计的研究目的和意义基本达到

5、。关键词神经网络 PID控制;MATLAB仿真;FPGA实现;浮点运算ABSTRACTTo overcome the weakness of traditional PID control in non-linear or time-variable systems and the weakness of neural network control such as its slowconvergence rate, huge calculation work and so on, a new and more effective neuralnetwork PID control metho

6、d comes into being by synthesizing traditional PID controlmethod and neural network. In this thesis, a new neural network PID controller isdesigned, simulated in software and implemented in hardware.Firstly, a neural network PID controller is established and its control algorithmis given, including

7、forward algorithm, error back propagation learning algorithm andcorrected back propagation algorithm. Then, the method of how to select initialconnecting weights of neural network is given. Besides, the stability of neural networkPID control system is analyzed.On the base of algorithm, several kinds

8、 of control systems with such a controllerare simulated by MATLAB and the excellent control performances are obtained.For practical application, the designed neural network PID controller isimplemented in FPGA hardware by VHDL programs. The whole FPGA design hasseveral modules in which the floating

9、point adder and multiplier act the most importantroles. At last, FPGA design is downloaded into Xilinx FPGA development kit to beverified and tested.The output of FPGA implementation and result of MATLAB calculation iscompared and the FPGA design is verified to be effective, which may be a foundatio

10、nof application.Keywords: neural network PID control, MATLAB simulation, FPGA implementation,floating point operationACKNOWLEDGEMENTSThe research work reported in this paper is sponsored by the Hong Kong ASMPacific Technology Corporation and Harbin Institute of Technology Shenzhen GraduateSchool.Tha

11、nks to ASM Pacific Technology Corporation for their valuable suggestionsand support. Through the process of the project, ASM Pacific Technology Corporationnot only enhances my ability to be familiar with the company requirements, but alsoenhances me the research ability and English level.I wish to e

12、xpress my sincere thanks to my industrial supervisors Eric Mok,Winnie Lai, Wilson Tsui, my academic supervisor Michael Wang and my colleaguesApple Chen, Chunming Wang, Sabrina Wang. They offer me a lot of assistance andguidance to do this project.Also thanks to my parents and all friends in our lab

13、and other labs who give meenthusiastic help.Finally, I would like to thank my Alma Mater Harbin Institute of Technologyand Shenzhen Graduate School.Nomenclature IXList of Tables XList of FiguresXIIntroduction. 11.1 Background . 11.2 Present research status 31.3 Goal and objectives. 5Design of Neural

14、 Network PID Controller . 62.1 Introduction. 62.2 Structures of controller and neurons . 62.3 Neural network PID control algorithm . 112.4 Stability analysis of neural network PID control systems 252.5 Characteristics of neural network PID controller . 322.6 Summary . 33Simulation of Neural Network

15、PID Control Systems 353.1 Introduction. 353.2 Simulation of linear systems . 363.3 Simulation of non-linear systems 403.4 Analysis. 42CONTENTSPageTU UTTU UTTU UTTU UTTU UT TU UTTU UT TU UTTU UT TU UTTU UTTU UT TU UTTU UT TU UTTU UT TU UTTU UT TU UTTU UT TU UTTU UT TU UTTU UTTU UT TU UTTU UT TU UTTU

16、UT TU UTTUUTTU UTReview of FPGAs 444.1 FPGAs description and advantages 20 . 44TU UP4.2 FPGAs architecture 21 . 45TU UP4.3 FPGAs development tools . 464.4 Contributions and limits of FPGAs for controllers. 474.5 FPGAs design flow . 48FPGA Implementation of Neural Network PID Control Algorithm . 525.

17、1 Introduction. 525.2 UART module implementation and verification 535.3 Block RAM module implementation and verification 575.4 DCM module implementation 595.5 Neural network PID controller module implementation and verification615.6 Analysis. 74Conclusion . 776.1 Conclusion 776.2 Future work . 78Ref

18、erences 79TU UTTU UT UTPTU UT UTPTU UT TU UTTU UT TU UTTU UT TU UTTU UTTU UT TU UTTU UT TU UTTU UT TU UTTU UT TU UTTU UT TU UTTU UT TU UTTU UTTU UT TU UTTU UT TU UTTU UTNOMENCLATUREnet jwijw jxi (t )u jyrE1lSME 2M total input of j th neuronconnecting weight from i th branch to j th neuronconnecting

19、weight from j th neuron to output layerinput from i th branch at any time tstate of j th neuronactual output of neural network at time tideal output of neural network at time tmean-square deviation between v(k ) and v (k )sampling numberself-learning step sizesign of floating point numbermantissa of

20、 floating point numberexponent of floating point numbermantissa after exponent matchLIST OF TABLESTableTable 5.1Table 5.2Table 5.3Table 5.4Table 5.5Page. 54. 62. 66. 69. 72Figure 1.1 Structure of utilizing neural network to set PID parameters. 3Figure 1.2 Structure of PID controller with single neur

21、on. 4Figure 2.1 Structure of neural network PID controller 7Figure 2.2 Model structure of a neuron 8Figure 2.3 Particular structure of neural network PID controller. 8Figure 3.1 Simulation result of first-order object control 38Figure 3.2 Simulation result of second-order object control 39Figure 3.3

22、 Simulation result of non-linear time-invariable object control. 41Figure 3.4 Simulation result of non-linear time-variable object control 42Figure 4.1 Generic architecture of an FPGA 46Figure 4.2 Top-down design approach. 47Figure 4.3 DSP and FPGA domains of use 48Figure 4.4 Process of Implementing

23、 a Design on FPGA . 49Figure 4.5 Simulation stages 51Figure 5.1 Block diagram of design . 52Figure 5.2 Connection between UART and PC . 53Figure 5.3 Signal distribution of DB-9. 54Figure 5.4 FSM state transition diagram 55Figure 5.5 Simulation of UART. 56Figure 5.6 The data that PC sent and received

24、 . 56LIST OF FIGURESFigureTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTPageFigure 5.7 Block RAMs perform as Dual-Port and Single-Port memory 57Fi

25、gure 5.8 Simulation of UART and RAM 58Figure 5.9 The data that PC sent and received . 59Figure 5.10 Circuit of DCM . 60Figure 5.11 16 bits floating point number format 62Figure 5.12 Block diagram of exponents match. 63Figure 5.13 Structure of floating point number adder 65Figure 5.14 Simulation of f

26、loating point adder 66Figure 5.15 Structure of floating point number multiplier . 68Figure 5.16 Simulation of floating point multiplier . 69Figure 5.17 Simulation of current sampling. 70Figure 5.18 Simulation of next sampling . 71Figure 5.19 Comparison between VHDLy and MATLABy 75Figure 5.20 Report

27、of control algorithm execution in ISE. 75TUUTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UTTU UT TU UTTU UT. Besides, the PID parameters are usually set byP. Although the self-adaptive control and robust control both can

28、resist thePuncertainty and complexity of objects, there still exists a gap that difficultly supplied 3.Pcontrolling complex systems. But it also has some weakness as follows 8:PChapter 1 IntroductionCHAPTER 1INTRODUCTION1.1 BackgroundSince the 1940s, the great development has been made in traditiona

29、l controltheory, thus it has owned integrated theory system and has been applied in the industryon a large scale. But the traditional PID control theory has some limitations, forexample, it is not suitable for uncertain systems, non-linear systems, time-variablesystems and multi-variable systems 8 P

30、experts according to their experiences. Thus it is a little difficult for some youngengineers 9 PPTherefore, intelligence control method is proposed which includes fuzzy control, expertcontrol system, neural network control methods and so on.Neural network control is an important branch of intellige

31、nce control and hasbecome the mainstream of intelligence control research for its obvious superiority inP1. For generic neural networks, the rate of convergence is very slow, the time fortraining and learning is very long. Thus they cant be accepted by most of controlsystems.2. When composite the co

32、ntrol systems, there is no rule to choose structure ofneural networks, especially to choose the neurons number of hidden layers. Since thechoosing should be decided after repetitive testing, thus there are some difficulties inpractical application.1inevitably leads to low operation speed, thus it is

33、 difficult to ensure real-time control 7.P. However, Field Programmable Gate Array (FPGA) has the characteristics ofPChapter 1 Introduction3. Generic neural networks has the possibility of putting themselves into localminimum because the initial values of connecting weights usually are chosen as ran

34、domnumbers. Thus the control performance cant achieve the prospective effect. Especially,due to the randomness of connecting weights, the initial stability of the running systemscant be ensured. If a control system is not stable at the beginning of the running, then itwill lose the base of applicati

35、on.4. There is no contact between the index of neural networks and control systems.The former has structure, parameter and enginery whereas the latter has dynamic andstatic state data such as rapid response, small overshoot and no steady-state error.5. When utilizing neural networks to compose contr

36、ollers, to satisfy the demandof control performance, the number of neurons is largely increased and the calculationwork of networks is huge, thus the real-time control cant be ensured under currentconditions.6. The multi-level neural network that has the arbitrary function approximationcapability is

37、 a kind of neural networks that applied most widely. But a neuron in such aneural network only has static input-output performance and the dynamic componentsmust be appended when use the neural networks to compose the control systems.Thus a new and more effective neural network PID control method co

38、mes intobeing by synthesizing traditional PID control method and neural network.In addition, the neural network models or algorithms are usually be programmedand simulated in computer. Since there is no hardware support for neural networkalgorithm, it is only implemented by software programming with

39、 serial method whichPTherefore, the problem of hardware implementation must be considered when apractical neural network applied system is constructed.Because the general micro-controller only executing programs sequentially, thusthe execution speed must be limited along with the increasing complexity of algorithm15Pparallelism of information flow, rapidity, flexibility, reliability and easy extension.2implemented by FPGA-based neural network 7.Phave characteristics and weakness as follows 8:Phidden layer and initial connecting weights are difficult to set and s

展开阅读全文
相关资源
猜你喜欢
相关搜索
资源标签

当前位置:首页 > 企业管理 > 管理学资料

本站链接:文库   一言   我酷   合作


客服QQ:2549714901微博号:道客多多官方知乎号:道客多多

经营许可证编号: 粤ICP备2021046453号世界地图

道客多多©版权所有2020-2025营业执照举报