1、FPGA/CPLD Max+plusII10.2 Max+plusII10.2 Max+plusII( Maxplus2, MP2) Altera PLD (Altera PLD QuartusII CPLD/FPGA). MAX+PLUSII MAX+PLUSII MAX+PLUSII Maxplus2 PLD MAX+PLUSII QuartusII QuartusII MAX+PLUSII , UltraEdit MAX+PLUSII QuartusII UltraEdit GUIDE / Max+plusII SW1 SW2 SW3 LED L3 L4 L3 L4 1FPGA/CPL
2、D Max+plusII10.2 4.1 MAX+plusII license MAX+plusII A https:/ 10.2 baseline B http:/ 10.2 BASELINE C ( ) MAX+plusII license.dat 2FPGA/CPLD Max+plusII10.2 4.2 MAX+plusII baseline10.2 10.2 setup.exe *.exe - -altera MAX+plusII MAX+plusII 3FPGA/CPLD Max+plusII10.2 4.3 MAX+plusII license license WIN20
3、00 4FPGA/CPLD Max+plusII10.2 license.dat OK Setting up Licensing in Windows NT To specify the license file in the Windows NT Control Panel, follow these steps: 1 choose Settings Control Panel from the Windows Start menu. 2 Double-click the System icon in the Control Panel window. 3 Click the Enviro
4、nment tab in the System Properties dialog box. 4 Click the System Variable list to highlight it, and then in the Variable box, type LM_LICENSE_FILE. 5 Type license.dat in the Value box. Example: C: maxplus license.dat 6 Click SET, and then click OK. 7 You can now run the Altera software. Setting Up
5、Licensing in Windows 2000 WINDOWS2000 licensing To specify the license file in the Windows 2000 Control Panel, follow these steps: 5FPGA/CPLD Max+plusII10.2 Windows 2000 license choose Settings Control Panel from the Windows Start menu. WINDOWS Double-click the System icon in the Control Panel wind
6、ow. Click the Advanced tab in the System Properties dialog box. Click the Environment Variables button. Click the System Variable list to highlight it, and then click New. Type LM_LICENSE_FILE in the Variable box. LM_LICENSE_F Type license.dat in the Value box. Example: C: MAXPLUS license.dat licens
7、e C: MAXPLUS license.dat Click OK. You can now run the Altera software. Altera 6FPGA/CPLD Max+plusII10.2 Setting up Licensing in Windows 98 To specify the license file in Windows 98, follow these steps: pen your PCs autoexec.bat file with a text editor. Type the following environment variable on it
8、s own line in the autoexec.bat file: set LM_LICENSE_FILE= license.dat. Example: set LM_LICENSE_FILE=C: maxplus license.dat Save the autoexec.bat file. Restart the PC. You can now run the Altera software. 7FPGA/CPLD Max+plusII10.2 4.4 MAX+plusII Win98 MAX+plusII ByteBlasterMV ByteBlaster WIN2000 WIN
9、XP WINNT WIN2000 WINNT WINXP ByteBlasterMV 4.4.1 WIN2000 1 / 2 / 8FPGA/CPLD Max+plusII10.2 3 4 9FPGA/CPLD Max+plusII10.2 5 6 10FPGA/CPLD Max+plusII10.2 7 MaxPlus2-Drivers-Win2000 inf 8 Altera ByteBlaster WIN2000 SP pgdhdlc.dll maxplus2/drivers/win2000 pgdhdlc.dll 11FPGA/CPLD Max+plusII10.2 4.4.2
10、 WINXP 1 12FPGA/CPLD Max+plusII10.2 2 3 13FPGA/CPLD Max+plusII10.2 4 5 14FPGA/CPLD Max+plusII10.2 6 7 15FPGA/CPLD Max+plusII10.2 8 MaxPlus2-Drivers-Win2000 inf 9 Altera ByteBlaster NOTE: WINXP 10 ALTERA , ALTERA MICROSOFT 4.4.3 WINNT 1 16FPGA/CPLD Max+plusII10.2 2 3 MaxPlus Drivers 4 5 Altera B
11、yteBlaster, MaxPlus 17FPGA/CPLD Max+plusII10.2 4.5 VHDL WIN2K 4.5.1 MAX+plusII MAX+PLUS II MAX+PLUS II MAX+PLUS II MAX+PLUS II - MAX+PLUS II 18FPGA/CPLD Max+plusII10.2 19FPGA/CPLD Max+plusII10.2 4.5.2 VHDL verilog-HDL FILE-NEW Text Editor File OK 20FPGA/CPLD Max+plusII10.2 4.5.3 VHDL -/ majority
12、_voter.vhd -/DOWNLOAD FROM WWW.HUSOON.COM -* LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; -* ENTITY majority_voter IS PORT(SW : IN std_logic_vector(3 DOWNTO 1); L : OUT std_logic_vector(4 DOWNTO 3); -L3 is a GREEN LED AND L4 is a RED LED END majority_voter; -* ARCHITECTURE concurrent OF majority_voter
13、 IS BEGIN WITH SW SELECT L = “01“ WHEN “011“, “01“ WHEN “101“, “01“ WHEN “110“, “01“ WHEN “111“, “10“ WHEN OTHERS; END concurrent; 21FPGA/CPLD Max+plusII10.2 4.5.4 FILE-SAVE 22 majority_voter.vhd Automatic Extension .vhd FPGA/CPLD Max+plusII10.2 FILE-PROJECT-SET PROJECT TO CURRENT FILE MAX+PLUS II
14、 23FPGA/CPLD Max+plusII10.2 4.5.5 Assign-Device show only fastest speed grades , EPM7128SLC84-15 Debice Family MAX7000S DEVICE EPM7128SLC84-15 ( Pin type ) 24FPGA/CPLD Max+plusII10.2 File-Project-save Byteblaster 10 CPLD 1 2) 3) 25 4) 220V 5 MA+plusII-prorammer 37FPGA/CPLD Max+plusII10.2 Option-Hardware Setup 38FPGA/CPLD Max+plusII10.2 Hardware Type ByteBlasterMV LPT1 CMOS Program OK HS102 SW1 SW2 SW3 39
