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1、附录 2 现场可编程门阵列简介瑞安肯尼FPGA 不应该被混淆为倒装芯片针脚栅格阵列,它一种形式的集成电路封装。 Altera 的第四代 FPGA 现场可编程门阵列(FPGA)是一种半导体器件,由于客户或设计师可以对其进行配置,因而在制造业得名“现场可编程” 。FPGA 利用编程逻辑电路图或源代码在硬件描述语言中进行编程,以指定芯片将如何工作。它们可以用来执行任何一个特定的,可以应用集成电路(ASIC)来实现的逻辑函数,但相比而言更有能力和更有功能优势。 FPGA 的可编程逻辑元件包含所谓的“逻辑块” ,并有分等级的可重新构成的连线连接,使逻辑块间“有线连在一起” ,这有点像一个片上可编程板。逻

2、辑块可以被配置以执行复杂的组合功能,也可以仅仅是简单的逻辑门和异或关系。在大多数的 FPGA 的逻辑块中还包括存储单元,这可能是简单的触发器或多个完整的内存块。历史在 FPGA 业界之初,可编程只读存储器(只读存储器)和可编程逻辑器件(可编程逻辑器件)便已经出现。可编程逻辑器件都已经在工厂或设计现场(现场可编程)被大批选择,可编程逻辑是指连线在硬件逻辑门之间的。 赛灵思公司的两位创始人,罗斯弗里曼和本纳得,在 1985 发明了第一个商业上可行的现场可编程门阵列- XC2064. XC2064 拥有可编程门阵列和可编程门阵列间的网络连接,开拓了新的技术和市场。XC2064 夸张的用仅仅 64个可

3、配置逻辑块(CLB),有两个 3 输入查找表(LUT)。20 余年后,弗里曼凭借他的发明进入全国发明家名人堂。 一些行业内的说法中,可编程逻辑阵列的基本概念和技术,以及门阵列的逻辑块的专利权是于 1985 年戴维和河皮特森的。20 世纪 80 年代末,海军水面作战部资助的一项实验提出的由史蒂夫开发的计算机将执行600,000 次编程。这一系统是成功的,该系统在 1992 年被授予专利。 赛附录 3 灵思公司在继续挑战和快速成长,从 1985 年到 90 年代中期,竞争对手开始竞争市场,这削弱了很大的市场份额。到 1993 年,赛灵思公司只占据约百分之十八的市场份额。 20 世纪 90 年代是一

4、个 FPGA 技术爆炸性增长的时代,无论是在复杂性和产量上。在 90 年代初,FPGA 主要用于电讯及网络。到 2010 年年底, FPGA 将发现自己在汽车和工业领域的市场价值,并将得到应用。 1997 年,FPGA 变得更加知名,当阿德里安汤姆森合并遗传算法和 FPGA技术,创造良好的识别装置。汤姆逊的算法允许 64 64 单元阵列在赛灵思 FPGA 芯片上来决定配置所需的合适的识别任务。现代发展 最近的趋势是,现在 FPGA 器件已经与 coarse-grained 方法进一步相结合,逻辑块和连线与传统的 FPGA 嵌入式微处理器及相关外设形成一个完整的“系统的可编程的芯片。”这项工作反

5、映了罗恩和哈娜加菲的巴勒斯高级系统组结合可重构 CPU 架构,在单芯片上称为 SB24,这项工作是在1982 年开始的。例如混合动力技术在赛灵思和 Virtex-4 器件上的应用,其中包括一个或一个以上的中央处理器嵌入到 FPGA 的逻辑结构。Atmel 以及 FPSLIC 是另外一些这样的设备,它使用的是 AVR 处理器结合 Atmel 的可编程逻辑架构。 取代的办法是,使用硬宏观处理器是利用“软”处理器内核的执行的FPGA 逻辑。(见下文“软处理器”)。 如前所述,许多现代的 FPGA 有能力重新安排“运行时间”,这是领导的想法或将重构计算系统-处理器重新配置,以适应自己手头的任务。虚拟处

6、理器的 Mitrion 是一个可重构软处理器的例子,可以在 FPGA 上实现。但是,它不支持在运行时动态重新配置,而是只适合自己的具体计划。 此外,新的非 FPGA 架构已开始出现。软件配置微处理器如 S5000 采用混合的方法,在同一个芯片上提供各种处理器和 FPGA 可编程内核。FPGA 的比较 历史上, FPGA 一直落后,由于其能源效益较低,一般实现的功能比固定的 ASIC 同行少。结合量,制造的改进,研究和开发,以及 I / O 能力更新的超级计算机已经基本上结束了 ASIC 和 FPGA 的性能差距。FPGA 的优势包括能在更短的时间内推向市场,能够在外部重新规划补丁,并降低非经常

7、性工程成本。供应商也可以采取中间路线,发展他们硬件上普通的FPGA ,可以在制造最终版本不再进行修改后前一直致力于设计。 赛灵思公司称,有一些关于 ASIC / FPGA 市场和技术动态变化的例子:集成电路成本上升, ASIC 的复杂性加强了开发时间和成本, R D 资源和人数正在减少,收入损失,缓慢的上市时间,越来越多手头拮据的穷人正在推动低成本技术的应用。这些趋势使得 FPGA 与 ASIC 在较量中胜出,历史上空前的被越来越多的使用,该公司开始进行越来越多的 FPGA 设计CPLD 和 FPGA 的主要区别在于架构。CPLD 实现了一定程度的限制性结构组成的一个或多个可编程总和产品,以及

8、逻辑阵列数量较少的频率寄存器。这样做的结果是减少了灵活性,以利用更多的可预见的时间延迟和更高的逻辑对互连的比例。在 FPGA 架构的另一方面主要是互连。这使它们更为灵活(在规定的实际执行范围内设计),但设计也复杂得多。 另一个 CPLD 和 FPGA 存在的显著区别是,大多数的 FPGA 有更高级别的嵌入式功能(如加法器和乘法器)和嵌入式记忆体,以及有逻辑块执行的解码器或数学函数。 一些 FPGA 有能力重新配置,可以让一部分设备被重新编程,而其他部分继续运行。 应用 FPGA 的应用包括数字信号处理,软件编程,无线电,航空航天和国防系统, ASIC 原型,医疗成像,计算机视觉,语音识别,加密

9、技术,生物信息学,计算机硬件仿真,射电天文学和越来越多的其他领域。 FPGA 的最初竞争对手是 CPLD。由于其规模,能力和速度的增加,他们开始接管一些大的职能。我国目前市场上被系统芯片充分。特别是在 20 世纪 90 年代后期引进的具有专用乘法器的 FPGA 器件,传统上它是唯一的数字信号处理器储备,而开始时 FPGA 不是。 FPGA 的应用,特别是寻找区域或算法,可以利用其所提供的大规模并行处理体系结构。其中一个领域是代码破译,并对算法进行加密。 FPGA 产品正被越来越多地用于常规的高性能计算中,如计算内核的FFT 或卷积上执行的 FPGA,它们不是微处理器。 拥有固有的并行逻辑资源的

10、 FPGA 即使在低频的环境下也可以进行大量附录 3 的计算。灵活的 FPGA 可以为越来越多的并行计算单位提供更高性能,更高的精度和更大范围的数字格式。这已提高到一个重构计算的一个新的层次,在任务要求的时间紧张时,可以从软件编程下载到 FPGA 中。 目前应用的传统设备都具有较长的设计周期,即使在源代码只有微小改动的情况下在现场等待 4-8 个小时也是常有的事,而通过 FPGA 的高性能计算就可以改变这点。有些 FPGA 产品被设计用来完成特定的应用,所以生产量很小。对于这些小批量的应用,该公司生产的器件成本比专用集成电路的低。现在,更新的性能扩大了其应用的范围。 结构 最常见的 FPGA

11、架构包括一系列的可配置逻辑块、I / O、路由通道。一般来说,所有的路由通道具有相同的宽度。多个 I / O 口可融入一行或一列的阵列中。 在电路中的应用,必须要求 FPGA 拥有充足的资源。虽然一些 CLBs 和I / O 需要的是简易的确定,即使在相同的逻辑中,路由的追踪在设计上也可能存在很大的不同。(如一个交叉开关比脉冲阵列相同门需要更多路由数。 )由于未使用路由跟踪,增加了一部分费用(和降低性能),但未提供任何好处, FPGA 的制造商试图提供足够的通道,使设计更改为最适合在 LUT 内部使用。这是通过实验与现有设计的有根据的预测。 燕山大学本科生毕业设计(论文)6Field-prog

12、rammable gate arrayRyan KennyFPGAs should not be confused with the flip-chip pin grid array, a form of integrated circuit packaging. An Altera Stratix IV GX FPGA.A field-programmable gate array (FPGA) is a semiconductor device that can be configured by the customer or designer after manufacturinghen

13、ce the name “field-programmable“. FPGAs are programmed using a logic circuit diagram or a source code in a hardware description language (HDL) to specify how the chip will work. They can be used to implement any logical function that an application-specific integrated circuit (ASIC) could perform, b

14、ut the ability to update the functionality after shipping offers advantages for many applications.FPGAs contain programmable logic components called “logic blocks“, and a hierarchy of reconfigurable interconnects that allow the blocks to be “wired together“somewhat like a one-chip programmable bread

15、board. Logic blocks can be configured to perform complex combinational functions, or merely simple logic gates like AND and XOR. In most FPGAs, the logic blocks also include memory elements, which may be simple flip-flops or more complete blocks of memory.HistoryThe FPGA industry sprouted from progr

16、ammable read only memory (PROM) and programmable logic devices (PLDs). PROMs and PLDs both had the option of being programmed in batches in a factory or in the field (field programmable), however programmable logic was hard-wired between logic gates. Xilinx Co-Founders, Ross Freeman and Bernard Vond

17、erschmitt, invented the first commercially viable field programmable gate array in 1985 the 附录 4 XC2064.The XC2064 had programmable gates and programmable interconnects between gates, the beginnings of a new technology and market. The XC2064 boasted a mere 64 configurable logic blocks (CLBs), with t

18、wo 3-input lookup tables (LUTs). More than 20 years later, Freeman was entered into the National Inventors Hall of Fame for his invention. Some of the industrys foundational concepts and technologies for programmable logic arrays, gates, and logic blocks are founded in patents awarded to David W. Pa

19、ge and LuVerne R. Peterson in 1985. In the late 1980s the Naval Surface Warfare Department funded an experiment proposed by Steve Casselman to develop a computer that would implement 600,000 reprogrammable gates. Casselman was successful and the system was awarded a patent in 1992. Xilinx continued

20、unchallenged and quickly growing from 1985 to the mid-1990s, when competitors sprouted up, eroding significant market-share. By 1993, Actel was serving about 18 percent of the market.The 1990s were an explosive period of time for FPGAs, both in sophistication and the volume of production. In the ear

21、ly 1990s, FPGAs were primarily used in telecommunications and networking. By the end of the decade, FPGAs found their way into consumer, automotive, and industrial applications.FPGAs got a glimpse of fame in 1997, when Adrian Thompson merged genetic algorithm technology and FPGAs to create a sound r

22、ecognition device. Thomsons algorithm allowed an array of 64 x 64 cells in a Xilinx FPGA chip to decide the configuration needed to accomplish a sound recognition task. Modern developmentsA recent trend has been to take the coarse-grained architectural approach a step further by combining the logic

23、blocks and interconnects of traditional FPGAs with embedded microprocessors and related peripherals to form a complete “system on a programmable chip“. This work mirrors the architecture by Ron Perlof and Hana Potash of Burroughs Advanced Systems Group which combined a reconfigurable CPU architectur

24、e on a single chip called the SB24. 燕山大学本科生毕业设计(论文)8That work was done in 1982. Examples of such hybrid technologies can be found in the Xilinx Virtex-II PRO and Virtex-4 devices, which include one or more PowerPC processors embedded within the FPGAs logic fabric. The Atmel FPSLIC is another such de

25、vice, which uses an AVR processor in combination with Atmels programmable logic architecture.An alternate approach to using hard-macro processors is to make use of “soft“ processor cores that are implemented within the FPGA logic. (See “Soft processors“ below).As previously mentioned, many modern FP

26、GAs have the ability to be reprogrammed at “run time,“ and this is leading to the idea of reconfigurable computing or reconfigurable systems CPUs that reconfigure themselves to suit the task at hand. The Mitrion Virtual Processor from Mitrionics is an example of a reconfigurable soft processor, impl

27、emented on FPGAs. However, it does not support dynamic reconfiguration at runtime, but instead adapts itself to a specific program.Additionally, new, non-FPGA architectures are beginning to emerge. Software-configurable microprocessors such as the Stretch S5000 adopt a hybrid approach by providing a

28、n array of processor cores and FPGA-like programmable cores on the same chip.FPGA ComparisonsHistorically, FPGAs have been slower, less energy efficient and generally achieved less functionality than their fixed ASIC counterparts. A combination of volume, fabrication improvements, research and devel

29、opment, and the I/O capabilities of new supercomputers have largely closed the performance gap between ASICs and FPGAs. Advantages include a shorter time to market, ability to re-program in the field to fix bugs, and lower non-recurring engineering costs. Vendors can also take a middle road by devel

30、oping their hardware on ordinary FPGAs, but manufacture their final version so it can no longer be modified after the design has been committed.附录 4 Xilinx claims that several market and technology dynamics are changing the ASIC/FPGA paradigm: IC costs are rising aggressively ASIC complexity has bol

31、stered development time and costs R&D resources and headcount is decreasing Revenue losses for slow time-to-market are increasing Financial constraints in a poor economy are driving low-cost technologies These trends make FPGAs a better alternative than ASICs for a growing number of higher-volume ap

32、plications than they have been historically used for, which the company blames for the growing number of FPGA design starts (see History). The primary differences between CPLDs and FPGAs are architectural. A CPLD has a somewhat restrictive structure consisting of one or more programmable sum-of-prod

33、ucts logic arrays feeding a relatively small number of clocked registers. The result of this is less flexibility, with the advantage of more predictable timing delays and a higher logic-to-interconnect ratio. The FPGA architectures, on the other hand, are dominated by interconnect. This makes them f

34、ar more flexible (in terms of the range of designs that are practical for implementation within them) but also far more complex to design for.Another notable difference between CPLDs and FPGAs is the presence in most FPGAs of higher-level embedded functions (such as adders and multipliers) and embed

35、ded memories, as well as to have logic blocks implement decoders or mathematical functions.Some FPGAs have the capability of partial re-configuration that lets one portion of the device be re-programmed while other portions continue running.ApplicationsApplications of FPGAs include digital signal pr

36、ocessing, software-defined radio, aerospace and defense systems, ASIC prototyping, medical imaging, computer vision, speech recognition, cryptography, bioinformatics, computer hardware emulation, radio astronomy and a growing range of other areas.燕山大学本科生毕业设计(论文)10FPGAs originally began as competitor

37、s to CPLDs and competed in a similar space, that of glue logic for PCBs. As their size, capabilities, and speed increased, they began to take over larger and larger functions to the state where some are now marketed as full systems on chips (SoC). Particularly with the introduction of dedicated mult

38、ipliers into FPGA architectures in the late 1990s, applications, which had traditionally been the sole reserve of DSPs, began to incorporate FPGAs instead. FPGAs especially find applications in any area or algorithm that can make use of the massive parallelism offered by their architecture. One such

39、 area is code breaking, in particular brute-force attack, of cryptographic algorithms.FPGAs are increasingly used in conventional high performance computing applications where computational kernels such as FFT or Convolution are performed on the FPGA instead of a microprocessor.The inherent parallel

40、ism of the logic resources on an FPGA allows for considerable computational throughput even at a low MHz clock rates. The flexibility of the FPGA allows for even higher performance by trading off precision and range in the number format for an increased number of parallel arithmetic units. This has

41、driven a new type of processing called reconfigurable computing, where time intensive tasks are offloaded from software to FPGAs.The adoption of FPGAs in high performance computing is currently limited by the complexity of FPGA design compared to conventional software and the extremely long turn-aro

42、und times of current design tools, where 4-8 hours wait is necessary after even minor changes to the source code.Traditionally, FPGAs have been reserved for specific vertical applications where the volume of production is small. For these low-volume applications, the premium that companies pay in ha

43、rdware costs per unit for a programmable chip is more affordable than the development resources spent on creating an ASIC for a low-volume application. Today, new cost and performance dynamics have broadened the range of viable applications.附录 4 ArchitectureThe most common FPGA architecture consists

44、 of an array of configurable logic blocks (CLBs), I/O pads, and routing channels. Generally, all the routing channels have the same width (number of wires). Multiple I/O pads may fit into the height of one row or the width of one column in the array.An application circuit must be mapped into an FPGA

45、 with adequate resources. While the number of CLBs and I/Os required is easily determined from the design, the number of routing tracks needed may vary considerably even among designs with the same amount of logic. (For example, a crossbar switch requires much more routing than a systolic array with

46、 the same gate count.) Since unused routing tracks increase the cost (and decrease the performance) of the part without providing any benefit, FPGA manufacturers try to provide just enough tracks so that most designs that will fit in terms of LUTs and IOs can be routed. This is determined by estimates such as those derived from Rents rule or by experiments with existing designs.

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