1、 Altium_Designer(protel_DXP)英文菜单汉化对应表表2014-01-08 17:06 5964 人阅读 评论(0) 收藏 举报分类：硬件（100） %s - No SI model for part%s - 没有部件的 SI模型%s Degrees%s 度%s mm%s 毫米%s object selected in %s document在%s 个文档有%s 个对象被选中%s Objects Displayed (%s Selected)%s 对象显示 (%s 被选择)%s objects selected%s 对象被选择(custom)(自定义)(pixels)(像
2、素)+12 Power Port+12 电源端口+5 Power Port+5 电源端口-5 Power Port-5 电源端口0 Hidden comment strings0 隐藏注释行0.01uF Capacitor0.01uF 电容0.1uF Capacitor0.1uF 电容1 Locked components1 锁定元件1 By Ascending X Then Ascending Y根据 X 递增量决定 Y 递增量1.0uF Capacitor1.0uF 电容100K Hertz Pulse100KHz 脉冲100K Hertz Sine Wave100KHz 正弦波100K
3、Resistor100K 电阻10K Hertz Pulse10KHz 脉冲10K Hertz Sine Wave10KHz 正弦波10K Resistor10K 电阻10uF Capacitor10uF 电容1K Hertz Pulse1KHz 脉冲1K Hertz Sine Wave1KHz 正弦波1K Resistor1K 电阻1M Hertz Pulse1MHz 脉冲1M Hertz Sine Wave1MHz 正弦波2 Pads and vias with a hole size between 15and 302 焊盘和过孔的孔大小在 15-30之间2.2uF Capacitor2
4、.2uF 电容4 All testpoints4 全部测试点4 Port Serial Interface4 端口串行接口4.7K Resistor4.7K 电阻47K Resistor47K 电阻5 Component track and arc silkscreenprimitives5 元件丝印层的基本线和弧线A KeywordA关键字Abort Simulation终止仿真About Design Explorer关于设计浏览器Absolute绝对Absolute Layer绝对层Absolute Origin绝对原点AC Small Signal Analysis Setup交流小信
5、号分析配置Accept Changes (Create ECO)承认改变 (建立 ECO)Access Code验证码Accuracy精度Activates open documents激活显示文本Active Low Input激活低电平输入Active Low Output激活低电平输出Active project当前激活项目Active sheet当前激活图纸Active Signals激活的信号Add All添加全部Add All Waveforms添加全部波形Add as Rule作为规则添加Add Assembly Outputs增加装配输出Add Class添加分类Add Com
6、ponent Part添加元件部件Add Document增加文本Add Document to Focused Project添加文档到当前项目Add Documentation Outputs增加文本输出Add Existing Project添加已存在的项目Add Fabrication Outputs增加生产输出Add first condition添加首要条件Add From To添加 From ToAdd Internal Plane增加内电层Add Layer添加层Add Library添加库Add License添加许可证Add Net添加网络Add Net Class添加网络
7、分类Add Netlist Outputs增加网表输出Add New Cursor增加新光标Add New Model添加新模式Add New Project添加新项目Add One添加一个Add or Remove Libraries添加或移出库文件Add Other Outputs添加其他输出Add Plane添加内电层Add Plot增加图表Add Project To Version Control将项目添加到版本控制Add Remove Component Libraries添加移出元件库Add Remove Libraries添加/移出库文件Add Reports增加报告Add S
8、elected添加选择的Add Selected Primitives to Component添加所选基本元素到元件Add Sheet Entry添加图纸入口Add Signal Layer增加信号层Add Suffix加后缀Add Template to Clipboard添加模板到剪贴板Add To Current Sheet添加到当前图纸Add to Custom Colors添加到自定义颜色Add To Design添加到设计Add To Entire Project添加到整个项目Add to new Y axis增加到新 Y轴Add to Project添加到项目Add To Sh
9、eet添加到图纸Add To Version Control添加到版本控制Add top level signals to waveform给波形增加顶层信号Add Variant添加变量Add Watch增加监视Add Wave增加波形Add Wave To Plot给图表增加波形Add Waveform增加波形Add waveforms to the new plot给新图表增加波形Add Y Axis增加 Y 轴Add/Edit Model增加/编辑模型Add/Remove Libraries装载/移出库文件Add/Remove Library装载/移出库AddAlias添加别名Adva
10、nced (Query)高级 (查询)Advanced Mode高级模式Affected Document所影响的文本Affected Object所影响的对象Aggregate合计Align Bottom底部对齐Align Components对齐元件Align Components by Bottom Edges根据元件下缘对齐Align Components by Horizontal Centers元件居中对齐Align Components by Left Edges元件左边对齐Align Components by Right Edges元件右边对齐Align Components
11、 by Top Edges元件对齐顶部边缘Align Components by Vertical Centers根据垂直中心对其元件Align Left左对齐Align Right右对齐Align Top顶部对齐Aligned - Bottom对齐 - 底部Aligned - Center对齐 - 中心Aligned - Inside Left对齐 - 内部左边Aligned - Inside Right对齐 - 内部右边Aligned - Left对齐 - 左边Aligned - Right对齐 - 右边Aligned - Top对齐 - 顶部all全部All Components全部元件
12、All Draft全部草图All Final全部最终All Hidden全部隐藏All Locked全部锁定All Nets全部网络All Off全部关闭All On全部打开All On Current Document全部当前文档All on Layer全部打开层All open schematic documents所有打开原理图文档All Orientations所有方向All schematic documents in the currentproject当前项目中所有原理图文档All Text Docs全部文本文件Allow Dock允许停放Allow multiple testp
13、oints on same net允许同一网络多个测试点Allow Ports to Name Nets允许端口到网络名Allow Sheet Entries to Name Nets允许图纸入口到网络名Allow Short Circuit允许电路短路Allow Synchronization With Database允许和数据库同步Allow Synchronization With Library允许和库同步Allow testpoint under component元件下允许测试点Allow Vias under SMD PadsSMD焊盘下允许过孔Allowed Orientat
14、ions允许方向Allowed Side and Order允许边和定制Alpha字母Alpha Numeric字母数字Alpha Numeric Suffix字母数字下标Alphabetically字母顺序Alternate 1另一选择 1Alternative其他选择Always load error file总是加载错误文件Amplitude振幅Analog模拟Analog +12V (+12V)模拟 +12V (+12V)Analog +5V (+5V)模拟 +5V (+5V)Analog Ground (AGND)模拟地 (AGND)Analog Routing 1模拟布线层 1An
15、alog Routing 2模拟布线层 2Analog Routing 3模拟布线层 3Analog Signal In模拟信号输入Analyse分析Analyses Setup分析配置Analyses/Options分析/选项Analysis分析Analysis Errors分析错误Analyze Design分析设计Analyze Document分析文档And Gate与门And to wrap long lines增加到可交换长行Angular角形Angular Dimension角度Angular Step角幅Animation speed动画速度Annotate标注Annotati
16、on注释Anode正极ANSIANSIAny任何Aperture File (using Wizard formats)光圈文件 (利用向导格式)Aperture Library光圈库Aperture List光圈列表Aperture Matching TolerancesD码表匹配公差Append Sheet Numbers to Local Nets附加图纸编号到本地网络Applicable Binary Rules适用的二元规则Applicable Rules适用的规则Applicable Unary Rules适用的一元规则Apply Filter应用过滤器Apply to Activ
17、e Chart Only仅适用于激活图表Apply to Entire Document适用于整个文本Arc弧线Arc (Any Angle)弧形 (任何角度)Arc (Center)弧形 (定中心)Arc (Edge)弧形 (边限)Arc Line Width弧线宽度Arc Radius圆弧半径Architecture结构Archive project document存档项目文件Arcs弧形Arithmetic算法Around Point附近的点Arrange All Windows Horizontally水平排列所有窗口Arrange All Windows Vertically垂直排
18、列所有窗口Arrange Components Inside Area在区域内排列元件Arrange Components Within Room在布局空间内排列元件Arrange Outside Board在底边界外排列Arrange Within Rectangle在矩形里排列Arrange Within Room在布局空间里排列Arrow Length箭头长度Arrow Line Width箭头线宽度Arrow Position箭头位置Arrow Size箭头大小Arrow Style Power Port发射型电源端口Arrow Width箭头宽度Articles and Tutori
19、als文章和教程Assembly %s装配 %sAssembly Drawings装配制图Assembly Outputs装配输出At Margin在页边距At Window在窗口Attributes on Layer层上属性Auto Create Composite自动创建合成Auto indent mode自动缩进模式Auto Pan Fixed Jump自动平移固定范围Auto Pan Off自动平移关闭Auto Pan Options自动平移选项Auto Pan ReCenter自动平移至中心Auto Placement自动布局Auto Placer自动放置Auto Route自动布线
20、Auto save every自动保存间隔Auto Zoom自动缩放Auto-Increment During Placement在布局时自动增加Auto-Junction自动加节点Auto-Position Sheet自动定位图纸Automatic (Based on project contents)自动（基于项目内容）Automatically crossprobe first error自动交叉检索第一个错误Automatically Remove Loops自动清除回路Autopan Options自动位移选项Autoposition自动定位Autosave desktop自动保存桌
21、面设置Available Libraries当前库Available Routing Strategies可用的布线策略Available Signals可用的信号Average Track Length (mil)平均铜线长度（mil）Avg平均Avoid Obstacle避开障碍物Back Annotate反向标注Background背景Backspace unindents回车取消缩进Backup Files备份文件Backup Options备份选项Ball Grid Arrays (BGA)BGABallistic可变速度移动Bank1组列 1Bank2组列 2Bar Style P
22、ower Port条型电源端口Bar to use as Main Menu栏作为主菜单使用Bar Type栏类型Bars栏Base Value低电平Baseline基线Baseline Dimension基线尺度Basic DC基本直流Batch批处理Batch Mode批命令模式Begin Group开始分组Below is a list of all the processesprovided by this server以下列表是此服务提供的所有处理模块Beta DegBeta降级Bezier曲线BGA OptionsBGA 选项Bidirectional Signal Flow双向信
23、号流向Bill of Materials材料清单Bill of Materials (By PartType) For Project%项目%s物料清单(元件类型)Bill of Materials For PCB%sPCB %s材料清单Bill of Materials For Project %s项目材料清单%sBitmap File位图文件Blank Project (Embedded)空白项目 (嵌入式)Blank Project (FPGA)空白项目 (FPGA)Blank Project (Library Package)空白项目 (库包)Blank Project (PCB)空白
24、项目 (PCB)Block Indent块缩进Block Name块名称Block Name : %s块名称 : %sBoard板Board Area Color板区域颜色Board Dimensions板尺寸Board in 3D3D 板视图Board Information板信息Board La&yers & Colors板层和颜色Board La&yers & Colors板层和颜色Board Layers Colors板层颜色Board Layers & Colors板层和颜色Board Layers and Colors板层和颜色Board Line Color板层线颜色Board
25、Options板选项Board Shape板形Board Specifications板技术参数Bold Waveforms实线波形BOOLEAN布尔数学体系Border (Auto-Detect)边界 (自动探测)Border Color边框颜色Border On边框显示Border Width边框宽度Bottom底层Bottom Dielectric底部绝缘层Bottom Layer底层Bottom Layer Annular Ring Size底层圆环尺寸Bottom Overlay底层丝印层Bottom Paste底层焊锡层Bottom Solder底层阻焊层Bottom Solder
26、 Mask底层阻焊层BottomLayer底层BottomOverlay底层丝印层Brackets支架Break All Component Unions从单元中分离出所有元件Break Component from Union从单元中分离出元件Break Track断开轨迹Breakpoints断点Brightness亮度Bring To Front Of带到某对象前面Browse浏览Browse Component Libraries浏览元件库Browse Components浏览元件Browse Libraries浏览库Browse Library浏览库文件Bubble Help Adv
27、isor (Shift+F1)浮动帮助顾问 (Shift+F1)Build Composite构造合成Build Later后来再建Build PCB Project构造 PCB 项目Build Project构造项目Build Query构造智能语句Build Sooner立即创建Build-Up绝缘层对Building Query from Board从板构造查询Bus总线Bus Entry总线入口Bus indices out of range总线超出范围Bus range syntax errors总线范围语法错误Bus Width总线线宽By class通过类By document
28、type通过文本类型C MenuC 菜单C StandardC 标准Calc. Copper Area计算.铜面积Calculated Impedance =计算阻抗=Calculated Trace Width =计算线宽=CAM DocumentCAM 文档CAM EditorCAM 编辑器Cannot Locate Document %s无法找到%s 文档信息Capacitance电容Capacitor电容Capacitors电容Categories类别Cathode负极Center Dimension中心点尺度Center Horizontal水平居中Center of Object对
29、象中心Center Vertical垂直居中Change Language更换语言Change Order改变顺序Change System Font改变系统字体Change Technology改变封装技术Channel Offset通道偏移Characteristic Impedance Driven Width特性阻抗驱动线宽Chart制图Chart name is blank图表名称为空Chart Options图表选项Check All Components检查所有元件Check In签入Check Mode校验模式Check Out签出Check Syntax校验语法Choose
30、a snap grid size选择捕获网格尺寸Choose Color选择颜色Choose cursor to delete选择要光标删除Choose cursor to jump to选择要跳转到的光标Choose Default Backup Folder选择缺省的备份文件夹Choose Default Document Folder选择缺省文档文件夹Choose Design Rule Type选择设计规则类型Choose Document选择文档Choose Document Scope选择文档范围Choose Document to Open选择要打开的文档Choose Docum
31、ent to Place选择文档放置Choose Documents选择文档Choose Documents to Add to Project %s选择文档加到项目%sChoose Documents To Compare选择比较文档Choose documents to compare - one from theleft list and one from the right list选择比较文档 - 一个从左面列表另一个从右面列表选择Choose Project选择项目Choose Project Group to Open选择要打开的项目组Choose Project to Open
32、选择要打开的项目Choose second corner选择第二角Choose the document to compare against thedesign hierarchy of %s选择与设计层次%s 进行比较的文本Choose the document to compare against thedesign hierarchy of Documents.PRJPCB选择与项目文本的层次设计进行比较的文本Choose Top Level选择顶层Choose WAS-IS File for Back-Annotation fromPCB从 PCB选择 WAS-IS文件作为反向注释C
33、ircle Style Power Port循环型电源端口Circuit电路Circuit Simulation电路仿真CKTCKTClamping箝位Class I分类 IClass II分类 IIClass Type类型Classes分类Classic Color Set典型颜色设置Clean All Nets清除全部网络Clean Single Nets清除单一网络Clear All Nets清除全部网络Clear All Test points清除全部检测点Clear All Testpoints清除全部测试点Clear Browser Marks清除浏览器标记Clear Class清
34、除类别Clear Current Filter清除当前过滤器Clear Current Filter (Shift+C)清除当前过滤器(Shift+C)Clear Existing清除已存在Clear Filter清除过滤器Clear History清除历史Clear Memory清除存储器Clear non-numerical values清除非数字的值Clear Selected清除已选Clear Status清除状态Clear workspace compile messages oncompile编译时清除工作空间编译信息Clearance间距Click Clears Selectio
35、n单击清除选择Click on the finish button to complete thetask在结束按钮上点击完成任务Client客户端Client License Usage客户端许可证用法Client Setup客户端设置Clip to Area显示框内文本Clipboard Reference剪贴板属性clock时钟Close Compile Errors关闭编译错误面板Close Compiled Object Debugger关闭编译对象调试器面板Close Differences关闭差异面板Close Files关闭文件面板Close Help Advisor关闭帮助顾
36、问面板Close Inspector关闭 检视器Close Libraries关闭 库Close List关闭 列表Close Messages关闭消息面板Close navigator关闭浏览器面板Close Projects关闭项目面板Close All Documents关闭全部文件Close Composite关闭合成Close Documents关闭文档Close Focused Project关闭当前项目Close Project关闭项目Close Project Documents关闭项目文档Collapse Row折叠行Collect Data For数据收集类型Collect
37、or集电极Color Options颜色选项Color Set颜色设置Colors & Gray Scales色彩/灰度级Colours颜色Column Best Fit适应列宽Command Reference命令参考Command Status命令状态栏Comment type注释类型Comp Drag拖动比较Comparator比较器Comparison Type Description比较类型描述Compile Active Document编译当前文档Compile Active Project编译当前项目Compile All编译全部Compile All Open Project
38、s编译全部已打开的项目Compile All Projects编译所有项目Compile Current Project编译当前项目Compile Document编译文档Compile Errors编译错误Compile FPGA Project编译 FPGA 项目Compile Later后来再编译Compile Library编译库Compile only if modified仅编译修改之后Compile PCB Project编译 PCB 项目Compile Project编译项目Compile Sooner立即编译Compiled编译Compiled Object Debugger
39、编译对象调试器Compiler Options编译选项Compiling %s正在编译 %sCompiling Flattened Project编译平行项目Complex Data复杂数据component元件Component %s元件%sComponent Actions元件操作Component Class Generator元件分类发生器Component Classes元件分类Component Comment元件注释Component Connections元件连接Component Cross Reference元件互相参照Component Cross Reference R
40、eport ForProject %s项目元件交叉参考报告%sComponent Designator%s元件标识符%sComponent Grid元件网格Component Links元件链接Component Name部件名Component Names元件名称Component Naming元件命名Component Nets元件网络Component Parameter元件参数Component Pin Designator元件引脚标识符Component Pin Editor元件引脚编辑器Component Pins元件引脚Component Placement元件布局Compone
41、nt Primitives元件基本元素Component Properties元件属性Component Report元件报告Component Rule Check元件规则检查Component scope for filtering andselection过滤及选择元件的范围Component Side元件层Component Type元件类型Component Types元件类型Component Wizard元件向导Component Wizard - Pin Grid Arrays (PGA)元件向导 - PGAComponents元件Components Cut Wires元件切
42、线Composite Drill Guide合成钻孔向导Composite Layers合并层Composite Properties合成特性Condition Type / Operator类型/操作状态Condition Value条件值Conductor Width导体宽度Conductors导体Configure Drill Pairs配置钻孔层对Configure Licenses配置软件许可证Configure PLD Compiler配置 PLD编译Configure Project Options for ActiveProject为当前项目配置项目选项Confirm Dele
43、te Parameter确认删除参数Confirm Global Edit确定全局编辑Confirm Remove %s确认删除%sConfirm remove the layer %s确认是删除层 %sConfirm Selection Memory Clear选择存储器清除时确认Connect Layer连接层Connect Style连接样式Connect To连接到Connect to Net连接到网络Connect Wire Check接线检查Connect Wire Extractor接线数据Connected Copper连接铜线Connected Tracks连接铜线Conne
44、ction Color连接颜色Connection Matrix连接矩阵Connector连接器Connector Type连接器类型Constant Level常数等级Constraints约束限制Contract All全部压缩Convert Part To Sheet Symbol转换元件为图纸符号Convert Selected Free Pads to Vias将所选自由焊盘转换为过孔Convert Selected Vias to Free Pads将所选过孔转换为自由焊盘Convert Special Strings转换特殊字符串Convert to DXP Plane Mode
45、转换为 DXP 内电层模式Coordinate坐标Coordinate Positions坐标位置Copper thickness铜厚度Copy (Ctrl+C)复制 (Ctrl+C)Copy Component复制元件Copy Footprint From/To复制封装 从/到Copy on Field复制域Copy preexisting edif models whenavailable当可访问到时拷贝已经存在的EDIF模型Copy Room Formats复制布局空间格式Copy to Layers复制到层Copyright ?Altium Limited 2002 Altium 版权
46、所有 2002Core (%s)核心 (%s)Corner角Corner 1角 1Corner 2角 2Corrections校正Coupling耦合Create a new Board Level Design Project创建新的板级设计项目Create a new FPGA Design Project创建新的 FPGA设计项目Create a new Integrated Library Package创建新的集成库包Create backup files创建备份文件Create compiled SimCode output file创建编译 SimCode输出文件Create C
47、omponent创建元件Create Engineering Change Order创建工程改变顺序(ECO)Create Expression创建表达式Create FFT Chart新建 FFT图表Create Library创建库Create List From PCB从 PCB建表Create Netlist From Connected Copper从连接的铜板创建网表Create New Chart新建图表Create New Database新建数据库Create Non-Orthoganal Room from selectedcomponents根据所选元件创建非正交布局空间Create Non-Orthogonal Room from Components根据元件创建非正交布局空间Create Orthogonal Room from Components根据元件创建正交布局空间Create Orthogonal Room from selectedcomponents根据所选元件创建正交布局空间Create Pairs From Layer Stack从层堆栈中创建层对Create Pairs From Used Vias从所用过孔中创建层对Creat
