1、上海交通大学 硕士学位论文 实时时钟RTC的IP设计 姓名：马玉韬 申请学位级别：硕士 专业：电路与系统 指导教师：秦建业;付宇卓 20050101 RTC IP 1 RTC IP SOC IP IP IP IC IP RTC IP IP RTC CMOS SOC SYNOPSYS Design Compiler RTC IP Verilog RTC IP I2C IP RTC IP 2 RTC IP RTC IP 1 IP DESIGN OF REAL TIME CLOCK MODULE Abstract Accompany the design and manufacture techno
2、logy of Integrated Circuits (IC) are developing towards the nano-meter field, IC has come into SOC (System On a Chip) era in which the techniques are developing with a high speed. Time to market becomes shorter and shorter because of the rapidly increment of complexity of a chip and extremely lack o
3、f skilled designers. Now reuse of IP (Intellectual Property) becomes the nuclear technique to shorten the time to market. In China, exploiting reusable IPs is the most important tasks because of the terrifically lack of IPs. In this thesis I summarized some basic knowledge about designing a reusable
4、 soft IP. In the first chapter the situations of RTC module, IC design and manufacture is introduced. In the second chapter, three different kinds of IP are introduced. Some rules of designing a reusable digital IC system are also included. In the third chapter the sketch map of RTC module, some tec
5、hniques of designing a system with multiple clock domains and synchronous and asynchronous signals are presented. In the fourth chapter, an I2C interface is supposed to be added to the RTC module to improve the IPs reusability. In the fifth chapter RTC IP 2 low-power design techniques in SOC design
6、are generally described. In the sixth chapter, coding styles for RTL (Register Transfer Level) synthesis, the methods of design a test bench and some concepts of logic synthesis are summarized. Finally, by synthesizing the RTC IP DC (Design Compiler) I finish the work of designing a soft IP. The cre
7、ative point of this thesis is that it provides a detailed describing of techniques of designing a system with multi-clock, and a detailed analysis in synchronous and asynchronous signals of the system. KEY WORDS: IP design, multiple clock system, low power, synthesis, coding style. RTC IP 1 2005 1 1
8、0 RTC IP 2 1 SOC System On a Chip “ ” IP SOC 1 IT CPU DSP IP ARM IP IP CPU ARM LSI SoC IC CPU 2 EVD IP “SoC ” IC IP SoC SoC RTC REAL TIME CLOCK RTC 2 RTC RTC CMOS RTC 2000 90 RTC CMOS 0.5 A 1.4V SIO/ SPI 2 I 2 C SOP/SSOP RICOH RTC TTF RTC RICOH R2051 3 3 RTC 4 RTC MCU EEPROM SRAM 5 EEPROM SRAM XICOR
9、 X1205 EPSON RTC 4543 XICOR X1228 MAXIM DS12C885,DS12C887 I2C , RV5C348A/B I 2 C 3 RTC I/O RTC I/O RTC I 2 C 3 RTC I/O RTC I/O RTC , , , , IP( Intellectual Property) IP , , , , , RTC IP XICOR EEPROM X12 IC RTC IP SOC ASIC Motorola DSP56300 DSP56800 RTC IP SOC SOC DSP 4 RTC IP IP I2C RTC SOC SOC IP S
10、OC SOC SOC DSP MPU IP SOC SOC SOC HISYS23200 SOC HISYS23200 SOC DSP MPU SOC PDA DSP MPU IP RTOS SOC SOC SOC DSP MPU core MPU RISC DSP SOC SOC DSP+ARM ARM DSP RTC SOC IP IP SOC RTC IP IP IC RTC IC I2C CMOS SOC RTC IP Verilog 5 SOC RTC SOC IP SOC RTC SOC RTC IP 6 IP IP intellectual property IP IP 6 SOC IC IC IP IP IP IC IP IC fabless IP IC IC SOC IP IC MPU IP IP IP IP IP 7 IP 2.2.1 IP IP IP 8 IP HDL 7 FPGA IP RTL (GUI) ( PCI )
