1、An Ultra-Low-Power, Temperature Compensated Voltage Reference Generator,指導教授:林志明 教授 學 生:劉彥均,IEEE 2005 CUSTOM INTEGRATED CIRCUITS CONFERENCE,Outline,Circuit Description Supply Voltage Dynamic Temperature Compensation Line Sensitivity Experimental Results Conclusion,Circuit Description,A low temperatu
2、re drift voltage reference is obtained by compensating the temperature dependence of the generated current with the temperature dependence of the NMOS threshold voltage. The particular configuration used allows us to suppress the effect of the temperature dependence of mobility. The proposed voltage
3、 reference was implemented in AMS 0.35 m CMOS IC technology.,Circuit Description (A)Current Generator Circuit(1),In order to reduce the channel modulation effect that causes a mismatch between the currents in the two branches, the channel lengths of the two transistors M5 and M6 are chosen large eno
4、ugh.,Circuit Description (A)Current Generator Circuit(2),Transistors M1 and M2 are biased in the subthreshold region, while transistors M3 and M4 work in the saturation region. region. Such behavior isachieved through careful biasing:The gate-source voltage of M3 (M4) must be larger than the gate-so
5、urce voltage of M1 (M2) Since the four transistors have the same drain current The W/L ratio of M1 (M2) has to be larger than that of M3 (M4).,Circuit Description (A)Current Generator Circuit(3),The I-V characteristics of a MOS transistor that operates in the saturation and in the subthreshold regio
6、n can be approximated by (1) and (2), respectively.,Circuit Description (A)Current Generator Circuit(4),Assuming that the currents in the two branches of the current circuit generator are equal, the currentbecomes:,Circuit Description (A)Current Generator Circuit(5),The effect of channel length modu
7、lation of M1 and M2 is negligible(subthreshold region, ). The channel length modulation effect of M3 and M4 is negligible since they are long-channel devices, and since their drain-source voltages have very small variations, when the supply voltage is varied.,Circuit Description (A)Current Generator
8、 Circuit(6),Almost all the variation of the supply voltage drops 1) on the drain-source voltage of M2, without causing large variations of the current I0, since it works in the subthreshold region, 2) on the drain-source voltage of M5.,Circuit Description (B)Active Load (1),The active load used to g
9、enerate a reference voltage with a low temperature drift. The output voltage reference has the expression:In order to ensure the correct temperature compensation it is necessary that most of the bias current flows through the transistor M7 and M8 rather than through the resistances R1 and R2.,Circui
10、t Description (B)Active Load (2),We determine the minimum value of the bias current that ensures the correct operation of the voltage reference generator,Supply Voltage Dynamic(1),We have to ensure that the transistor M2 has a drain-source voltage of at least 100 mV so that the effect of the drain-s
11、ource voltage in (2) and then the channel length modulation of M2 can be neglected. Consequently, the following expression has to be satisfied,Supply Voltage Dynamic(2),The maximum supply voltage is imposed by the maximum drain-source voltage allowed for MOS transistors, as shown below,Temperature C
12、ompensation(1),The threshold voltage of an NMOS transistor decreases linearly with the temperature, as shown belowwhere is a BSIM3v3 coefficient that models the temperature dependence of the threshold voltage.,BSIM3(Berkeley Short channel Insulated gate field effect transistorModel)模型是由加州柏克萊分校(UC Be
13、rkeley)在1993 發表的重要技術，而此元件模型可用模擬含括0.18m (0.110-6 m) MOS 元件的比電與位電,Temperature Compensation(3),Let us define h asFrom (3), (4) and (9), and assuming that (5) is fulfilled, we can derive the following expression for the reference voltage,Temperature Compensation(4),Differentiating (10) with respect to t
14、he temperature and taking into account (8), one obtainswhere is the Boltzmann constant and q is the electron charge,Temperature Compensation(5),Equating (11) to zero, we obtain,Line Sensitivity,By calculating and from (1) and substituting them in (4), we can derive the following expression for the o
15、utput voltage,Experimental Results(1),mean reference voltage ofabout 168 mV with avariation of 2.3 mV atroom temperature when thesupply voltage varies from1.5 V to 4.3 V,The measured temperature coefficient at VDD=2 V and VDD=3 V is 25 ppm/C and increases to 37 and 39 ppm/C at VDD=4.3 V and VDD=1.5
16、V. At 80 C the current drawn at the maximum supply voltage is 2.4 A and at the minimum supply voltage is 1.5 A.,Experimental Results(2),Experimental Results(3),Experimental Results(4),The power supply rejection ratio, without any filtering capacitor, is -65 dB at 100 Hz and -57 dB at 10 MHz, for the
17、 smallest supply voltage.,Experimental Results(5),Conclusion,A 25 ppm/C voltage reference with a supply current of only 1.2 A, at 1.5 V, has been presented. The proposed voltage reference has been implemented with a standard 0.35 CMOS process. Particular attention has been put at minimizing the power consumption, achieving at the same time very good PSRR and temperature compensation, without any trimming procedure.,
