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类型中山大学软件学院专业课计算机组成原理第4章.ppt

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    中山大学软件学院专业课计算机组成原理第4章.ppt
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    1、Review,Characteristics of Memory SystemTypes of MemoryThe Memory HierarchyCache MemoryVirtual Memory,Main Content,Micro-OperationsControl of the ProcessorHardwired ImplementationMicroprogrammed Control,Control Unit,The control unit (CU) is that portion of the processor that actually causes things to

    2、 happen The control unit issues control signals external to the processor to cause data exchange with memory and I/O modules The control unit issues control signals internal to the processor to move data between registers, to cause the ALU to perform a specified function, and to regulate other inter

    3、nal operations,Micro-Operations,Programs are executed as a sequence of instructions Each instruction consists of a series of steps that make up the instruction cycle - fetch, decode, etc. Each of these steps are, in turn, made up of a smaller series of steps called micro-operations micro-operations

    4、are the functional, or atomic, operations of a processor,Micro-Operations,Constituent Elements of Program Execution,Operation analysis,There are 4 processor cycle for the complementation of a instruction,The Fetch cycle,The Indirect cycle,The Execute cycle,The Interrupt cycle,Only fetch and execute

    5、cycles always occurring,The things needed to specify the function of a processor,Operations (opcode) Addressing modes Registers I/O module interface Memory module interface Interrupt processing structure,Fetch - 4 Registers,Memory Address Register (MAR) Connected to address bus Specifies address for

    6、 read or write op Memory Buffer Register (MBR) Connected to data bus Holds data to write or last data read Program Counter (PC) Holds address of next instruction to be fetched Instruction Register (IR) Holds last instruction fetched,Fetch Sequence,Address of next instruction is in PC Address (MAR) i

    7、s placed on address bus Control unit issues READ command Result (data from memory) appears on data bus Data from data bus copied into MBR PC incremented by 1 (in parallel with data fetch from memory) Data (instruction) moved from MBR to IR MBR is now free for further data fetches,Fetch cycle micro-o

    8、perations,Memory MBR,Rules for Clock Cycle Grouping,Proper sequence must be followed MAR - (PC) must precede MBR - (memory) Conflicts must be avoided Must not read & write same register at same time MBR - (memory) & IR - (MBR) must not be in same cycle Also: PC - (PC) +1 involves addition Use ALU Ma

    9、y need additional micro-operations,Indirect Cycle,Interrupt Cycle,At the completion of the execute cycle, a test is made to determine whether any enabled interrupts have occurred The nature of interrupt cycle varies greatly from one machine to another A simple sequence of events as followMBR -(PC)MA

    10、R - save-addressPC - routine-addressmemory - (MBR),Execute Cycle,The fetch, indirect, and interrupt cycles are simple and predictable each involves a small, fixed sequence of micro-operations The execute cycle, different for each instruction Can be discussed in three types Instruction without memory

    11、 access Instruction with memory access Branch instruction,1. Instruction without memory access,(1) CLA clean A,(2) COM complement,(3) STP halt,2. Instruction with memory access,STA X,ADD R1, X,(2) Store data instruction,(1) Add instruction,3. Branch instruction,ISZ X The content of location X is inc

    12、remented by 1. If the result is 0, the next instruction is skipped.(MBR) memory if (MBR) = 0 then (PC)+1PC Notes: The steps in red can be done simultaneously.,Instruction Cycle,Each phase of the instruction can be decomposed into a sequence of elementary micro-operations E.g. fetch, indirect, and in

    13、terrupt cycles For execute cycle One sequence of micro-operations for each opcode Need to tie sequences of micro-operations together, so, assume new 2-bit Instruction Cycle Code (ICC) register designates which part of cycle processor is in 00: Fetch 01: Indirect 10: Execute 11: Interrupt,Flowchart f

    14、or Instruction Cycle,Functional Requirements,The definition of control unit functional requirements is the basis for the design and implementation of the control unit The following three-step process leads to a characterization of the control unit: Define basic elements of processor Describe micro-o

    15、perations that processor performs Determine the functions that the control unit must perform to cause the micro-operations to be performed,Basic Elements of Processor,ALU is the functional essence of CPU Registers are used to store data or status information internal to the CPU Internal data paths a

    16、re used to move data between registers and between register and ALU External data paths link registers to memory and I/O modules, often by means of a system bus Control Unit causes operations to happen within the CPU,Types of Micro-operation,Transfer data between registers Transfer data from registe

    17、r to external Transfer data from external to register Perform arithmetic or logical ops,Functions of Control Unit,More explicitly, the control unit performs two basic task: sequencing and execution Sequencing Causing the CPU to step through a series of micro-operations Execution Causing the performa

    18、nce of each micro-op This is done using Control Signals,Control Signals,Must have inputs that allow it to determine the state of the system Must have outputs that allow it to control the behavior of the system,Control Signals- Inputs,Clock One micro-instruction (or set of parallel micro-instructions

    19、) per clock cycle Instruction register Op-code for current instruction Determines which micro-instructions are performed Flags State of CPU Results of previous operations From control bus Interrupts Acknowledgements,Control Signals - output,Within CPU Cause data movement Activate specific functions

    20、Via control bus To memory To I/O modules,Example Control Signal Sequence - Fetch,MAR - (PC) Control unit activates signal to open gates between PC and MAR MBR - (memory) Open gates between MAR and address bus Memory read control signal Open gates between data bus and MBR,Data Paths and Control Signa

    21、ls,Internal Organization,Usually a single internal bus Gates control movement of data onto and off the bus Control signals control data transfer to and from external systems bus Temporary registers needed for proper operation of ALU,CPU with Internal Bus,CU 1 R,CPU with internal bus example,(1) ADD

    22、X fetch cycle,PC,MBR,OP(IR),control signals,control signals,CPU internal bus,clock,MAR,MBR,IR,CU,(2) ADD X indirect cycle,MBR,MBR,Effective Address (IR(Address),clock,MAR,ALU,control signals,control signals,CPU internal bus,MBR,IR,MAR,1 R,clock,MAR,MBR,control signals,CPU internal bus,(3) ADD X exec

    23、ute cycle,MBR,Z,AC,(AC)+(Y),MAR,MBR,Y,ALU,AC,Z,ALU,Control Unit with Decoded Inputs,Hardwired Implementation (1),Control unit inputs Flags and control bus Each bit means something Instruction register Op-code causes different control signals for each different instruction Unique logic for each op-co

    24、de Decoder takes encoded input and produces single output n binary inputs and 2n outputs,Hardwired Implementation (2),Clock Repetitive sequence of pulses Useful for measuring duration of micro-ops Must be long enough to allow signal propagation Different control signals at different times within ins

    25、truction cycle,Timing Signals,CLK,T0,T1,T2,T3,Clock Cycle,Hardwired Implementation,The key inputs are the instruction register, the clock, flags, and control bus signal. The outputs are control signals, each control signal has individual Boolean expression. Derive the Boolean expression between the

    26、inputs and output.,Problems With Hard Wired Designs,Complex sequencing & micro-operation logic Difficult to design and test Inflexible design Difficult to add new instructions,Micro-programmed Control,The term microprogram was first coined by M.V.Wilkes in the early 1950s Use sequences of instructio

    27、ns to control complex operations Called micro-programming or firmware,Implementation,All the control unit does is generate a set of control signals Each control signal is on or off Represent each control signal by a bit Have a control word for each micro-operation Have a sequence of control words fo

    28、r each machine code instruction Add an address to specify the next micro-instruction, depending on conditions,Control Unit,The set of microinstructions is stored in the control memory. The control address register contains the address of the next microinstruction to be read.,When a microinstruction

    29、is read from the control memory, it is transferred to a control buffer register.,Organization of Control Memory,Typical Microinstruction Formats,Functioning of Microprogrammed Control Unit,Micro-instruction Types,Each micro-instruction specifies single (or few) micro-operations to be performed(verti

    30、cal micro-programming) Each micro-instruction specifies many different micro-operations to be performed in parallel (horizontal micro-programming),Horizontal Micro-programming,Wide memory word High degree of parallel operations possible Little encoding of control information,Vertical Micro-programmi

    31、ng,Width is narrow n control signals encoded into log2 n bits Limited ability to express parallelism Considerable encoding of control information requires external memory word decoder to identify the exact control line being manipulated,Execute the Micro-programming,Turn on all the control lines ind

    32、icated by a 1 bit; leave off all control lines indicated by a 0 bit. If the condition indicated by the condition bits is false, execute the next microinstruction in sequence. If the condition indicated by the condition bits is true, the next microinstruction to be executed is indicated in the addres

    33、s field.,Micro-program Word Length,Based on 3 factors Maximum number of simultaneous micro-operations supported The way control information is represented or encoded The way in which the next micro-instruction address is specified,Design Considerations,Size of microinstructions Address generation ti

    34、me Determined by instruction register Once per cycle, after instruction is fetched Next sequential address Common in most designed Branches Both conditional and unconditional,Advantages and Disadvantages of Microprogramming,Simplifies design of control unit Cheaper Less error-prone Slower,Example (T

    35、he address of next microinstruction can be obtained in the address field directly.),Review Questions (思考题),CHAPTER 0,1. Provide a typical list of the inputs and outputs of a control unit.2. What is the difference between a hardwired implementation and a microprogrammed implementation of a control unit?,Next Lesson,CHAPTER 0,Chapter 1 The 80x86 Microprocessor,

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