1、 数字电子技术（双语）A 试卷 第 1 页 共 8 页北京科技大学 20082009 学年 第 一 学期数字电子技术（双语） 试卷（A）院(系) 班级 学号 姓名 试卷卷面成绩 (占课程考核成绩的 70%)题号 一 二 三 四五六七小计平时 成绩课程考核成绩得分、 单项选择（15 分）1、A quantity having discrete values is ( ).(a) a digital quantity (b) an analog quantity(c) a binary quantity (d) a natural quantity2、In a certain digital wa
2、veform, the period is twice the pulse width. The duty cycle is ( ).(a) 100% (b) 50% (c) 200%3、The binary number 11011101 is equal to the decimal number ( ).(a) 121 (b) 221 (c) 441 (d) 2564、The 1s complement of 10111001 is ( ).(a) 01000111 (b) 01000110 (c) 11000110 (d) 101010105、The output of an OR g
3、ate with inputs A, B and C is a 1 (HIGH) when ( ).(a) A=1, B=1, C=1 (b) A=0, B=0, C=1(c) A=0, B=0, C=0 (b) answers (a), (b), and (c) (e) only answers (a) and (b)6、The Boolean expression is ( )A(a) a sum term (b) a literal term (c) a product term (d) a complemented term7、The domain of the expression
4、is ( ).BDCB(a) A and D (b) B only (c) A, B, C and D (d) none of this8、An example of a sum-of-products expression is ( ).(a) (b) )C(A(c) (d) both answers (a) and (b)9、A full-adder is characterized by ( ).(a) two inputs and two outputs (b) three inputs and two outputs(c) two inputs and three outputs (
5、d) two inputs and one output得 分装 订 线 内 不 得 答 题自 觉 遵 守 考 试 规 则，诚 信 考 试，绝 不 作 弊数字电子技术（双语）A 试卷 第 2 页 共 8 页10、 If an octal-to-binary priority encoder has its 0, 2, 5 and 6 inputs at the active level, the active-HIGH binary output is ( ).(a) 110 (b) 010 (c) 101 (d) 00011、 The output pulse width of a nonr
6、etriggerable one-shot depends on ( ).(a) the trigger intervals (b) the supply voltage (c) a resistor and capacitor (d) the threshold voltage12、 The purpose of the clock input to a flip-flop is to ( ).(a) clear the device (b) set the device (c) always cause the output to change states(d) cause the ou
7、tput to assume a state dependent on the controlling (S-R, J-K or D) inputs.13、 A DRAM must be ( ).(a) replace periodically (b) refreshed periodically(c) always enabled (d) programmed before each use14、 An DAC is a ( ).(a) digital-to-analog computer (b) digital analysis calculator(c) data accumulatio
8、n converter (d) digital-to-analog converter15、 The quantization process ( ).(a) converts the sample-and-hold output to binary code (b) converts a sample impulse to a level(c) converts a sequence of binary codes to a reconstructed analog signal(d) filters out unwanted frequencies before sampling take
9、s place、 基本电路分析（40 分）1、 (10)Simplify the following expressions as much as possible.(1) CABCBAX(2) )12,(d)5,1398,720(m)Z,YXW(F得 分数字电子技术（双语）A 试卷 第 3 页 共 8 页2、 (12) Analyze the circuit in Figure2-2.(1) Write the output expression for the circuit.Figure 2-2(2) Develop the truth table for the circuit.(3)
10、 Minimize the gates required to implement the function.(4) Implement (实现) the circuit by using only NOR gates.3、 (4)The waveforms in Figure 2-3 are applied to the comparator as shown. Determine the output (A=B) waveform. Figure 2-34、(8) A 74178 shift register is described by the given table. All sta
11、te changes occur on the 10 装 订 线 内 不 得 答 题自 觉 遵 守 考 试 规 则，诚 信 考 试，绝 不 作 弊数字电子技术（双语）A 试卷 第 4 页 共 8 页transition of the clock. The shift register is connected as shown. Complete the timing diagram.5、(6)Analyze the circuit in Figure 2-5, then answer the questions (1)What is the word length, word capacit
12、y and address line of each memory?(2)What is the word length, word capacity and address line of the expansion memory?Figure 2-5数字电子技术（双语）A 试卷 第 5 页 共 8 页、 电路分析与设计（30 分）1、(6)You wish to detect only the presence of the codes 1110, 1001, 0101 and 1011. An active-HIGH output is required to indicate thei
13、r presence. Develop the logic circuit with a single output that will indicate when any one of these codes is on the inputs. For any other code, the output must be LOW. Please use a 4-line-to-16-line decoder with fewer gates as needed.2、(8)Show how to connect two 74LS160s for a modulus-35 counter.3、(
14、4)A D flip-flop is connected as shown in Figure 3-3. Determine the Q output in relation to the clock and 得 分装 订 线 内 不 得 答 题自 觉 遵 守 考 试 规 则，诚 信 考 试，绝 不 作 弊数字电子技术（双语）A 试卷 第 6 页 共 8 页inputs. Figure 3-34、(12)Determine the sequence of the counter in Figure 3-4, showing the Q1, Q2 and Q3 waveforms.Figure
15、3-4数字电子技术（双语）A 试卷 第 7 页 共 8 页、 综合提高（15 分）Examine the circuit in Figure 4-1carefully. Answer the following questions. 74HC151 is a 1-of-8 Multiplexer and 74LS161 is a modulus-16 synchronous counter. (1) What is the circuit connected by a 555 timer？A one-shot or an astable multivibrator?(2) Illustrate
16、 how does the circuit works?(3) Determine the output Vo waveform. Assume that the 74HC151 has input waveforms as shown in Figure 4-1. 注：本题题目给得不完全，仅做参考！Figure 4-1得 分装 订 线 内 不 得 答 题自 觉 遵 守 考 试 规 则，诚 信 考 试，绝 不 作 弊数字电子技术（双语）A 试卷 第 8 页 共 8 页Function Table of 74LS160 (moudulus-10)/ 74LS161 (moudulus-16)CP DRLEP ET FUNCTIONX 0 X X X clear 1 0 X X loadX 1 1 0 1 keepX 1 1 X 0 keep(but C=0) 1 1 1 1 counting
