1、1parameter参数传递的 16 位乘法器选用课后习题设计题目：设计一个 4 位乘法器，为此首先设计一个 4 位加法器，用例化语句调用这个加法器，用移位相加的方式完成乘法。并以此为基础，使用 parameter 参数传递的功能，设计一个 16 位乘法器。加法器采用行波进位的方法。4 位加法器设计如下：module ripple_carry_adder(x, y, cin, sum, cout);parameter N = 4;input cin;input N-1:0 x, y;output N-1:0 sum;output cout;reg cout;reg N-1:0 sum;reg
2、qN:0;always (x or y or cin)begin:ADDERinteger i;q0 = cin;for(i=0; i=N-1; i=i+1)beginqi+1 = (xisumi = xi yi qi;endcout = qN;endendmodule以此为基础的 4 位乘法器如下：module top(load, rst, clk, dataa, datab, sum);parameter n = 4;input load;input rst;2input clk;input n-1:0 dataa;input n-1:0 datab;output 2*n-1:0 sum;
3、parameter 1:0 state_s1 = 0,state_s2 = 1;reg 1:0 next_state;reg 2*n-1:0 dataa_register;reg n-1:0 datab_register;reg 2*n-1:0 sum_tmp,sum_tmp2;wire cout;assign sum = sum_tmp;always (negedge rst or posedge clk)begin: integer i;if (rst = 1b0)beginfor (i = 0; i = 2 * n - 1; i = i + 1)begindataa_registeri
4、= 1b0;sum_tmpi = 1b0;endfor (i = 0; i = n - 1; i = i + 1)datab_registeri = 1b0;next_state = state_s1;endelse case (next_state)state_s1 :if (load = 1b1)begindataa_registern - 1:0 = dataa;datab_register = datab;for (i = 0; i = 2 * n - 1; i = i + 1)sum_tmpi = 1b0;next_state = state_s2;endstate_s2 :begi
5、nif (datab_register0 = 1b1)3/ sum_tmp = sum_tmp + dataa_register;sum_tmp=(n-1)b0,cout,sum_tmp2n-1:0;if (datab_register = 4h0)next_state = state_s1;elsebegindatab_registern - 2:0 = datab_registern - 1:1;datab_registern - 1 = 1b0;dataa_register2 * n - 1:1 = dataa_register2 * n - 2:0;dataa_register0 =
6、1b0;endendendcaseendripple_carry_adder #(N = 4) u0(.x(sum_tmp), .y(dataa_register), .cin(1b0), .sum(sum_tmp2), .cout(cout);endmodule以此为基础的 16 位乘法器为：module top(load, rst, clk, dataa, datab, sum,ready);parameter n = 16;input load;input rst;input clk;input n-1:0 dataa;input n-1:0 datab;output 2*n-1:0 s
7、um;output ready;parameter 1:0 state_s1 = 0,state_s2 = 1;reg 1:0 next_state;reg 2*n-1:0 dataa_register;reg n-1:0 datab_register;reg 2*n-1:0 sum_tmp;reg ready;wire 2*n-1:0 sum_tmp2;wire cout;integer i;assign sum = sum_tmp;4always (negedge rst or posedge clk)beginif (rst = 1b0)beginready=1b0;for (i = 0
8、; i = 2 * n - 1; i = i + 1)begindataa_registeri = 1b0;sum_tmpi = 1b0;endfor (i = 0; i = n - 1; i = i + 1)datab_registeri = 1b0;next_state = state_s1;endelse case (next_state)state_s1 :if (load = 1b1)begindataa_register2*n - 1:n=0;dataa_registern - 1:0 = dataa;datab_register = datab;ready=1b0;for (i
9、= 0; i = 2 * n - 1; i = i + 1)sum_tmpi = 1b0;next_state = state_s2;endstate_s2 :beginif (datab_register0 = 1b1)/ sum_tmp = sum_tmp + dataa_register;sum_tmp=sum_tmp2;if (datab_register = 4h0) begin next_state = state_s1;ready=1b1;end elsebegindatab_registern - 2:0 = datab_registern - 1:1;datab_regist
10、ern - 1 = 1b0;dataa_register2 * n - 1:1 = dataa_register2 * n - 2:0;5dataa_register0 = 1b0;endendendcaseendripple_carry_adder#(2*n) u0(.x(sum_tmp), .y(dataa_register), .cin(1b0), .sum(sum_tmp2), .cout(cout);endmodule6流程图：开始ret=0state_s1Load=1state_s2Datab=1b1移位移位后数据是否加 0输出复位载入新数加法器 adderYesYesNoNoYesNoYesNo7仿真图：4 位加法器4 位乘法器16 位乘法器
