1、Lecture 5 - Operation of a Basic Computer Architecture,Dr Richard Reilly Dept. of Electronic & Electrical Engineering Room 153, Engineering Building,To insert your company logo on this slideFrom the Insert Menu Select “Picture” Locate your logo file Click OKTo resize the logoClick anywhere inside th
2、e logo. The boxes that appear outside the logo are known as “resize handles.” Use these to resize the object. If you hold down the shift key before using the resize handles, you will maintain the proportions of the object you wish to resize.,Typical Instruction Set,A list of instructions for our sim
3、ple 16-bit CPU including a list of possible condition codes used for the program control instructions.,Typical Instruction Set,Typical Instruction Set,Typical Condition Codes,Each instruction is encoded with a 16-bit hex value. The CPU can thus uniquely decode each instruction. using an orthogonal s
4、tructure the decoding is simplified.,Fetch, Decode, Execute,Processor runs a program by repeatedly fetching and executing instructions from main memory.Execution of each instruction is broken down into two phases. Fetch Instruction phase Decode and Execute Instruction phaseMore advanced computers se
5、parate decode and execute into 2 phases. Fetch phase reads the instruction stored from memory at the location pointed to by the program counter into the Instruction Decode register. Decode and Execute phase decodes the instruction and executes it.,Operation of the CPU,Assembly Language Conventions,M
6、otorola Convention Assume all numbers are decimal Use $ to specify a HEX number, e.g. $B = 11 Use # to specify a constant, e.g. #12 Use register names of Rn, e.g. R2 or ACC for Accumulator Use to specify indirect addressing register is used as a pointer Use ; to indicate rest of line is a comment,Op
7、eration of the CPU,Fetch, Decode, Execute,Microprocessor is connected to main memory by a data, address and control bus.,Need to fetch this information from memory. Instruction and data occupy various memory locations. Each location being identified by a unique address.,Fetch, Decode, Execute,Contro
8、l bus controls the action Reading or Writing data to memory,Operation of the CPU,To start the operation of the CPU the RESET line is asserted (by bringing it low). This resets the PC to $0000. After the RESET line is de-asserted (by bringing it high) the CPU starts operation. When running a program,
9、 processor fetches instructions by providing an address on the address bus and reading the instructions from the data bus.,Execution of the Move Immediate,Before running a program the PC must be initialised with address of first instruction.The first operation is to Fetch the instruction stored at t
10、he memory location pointed to by the PC, instruction at M0000. Fetch Instruction: Drive the PC onto the address bus Strobe the RD low On rising edge of the RD line, data bus is latched into ID register Increment the PCThe PC now contains the address of the next instruction allows the CPU to keep tra
11、ck where it is in the program,Operation of the CPU,Execution of the Move Immediate,This instruction is decoded as MOVE a constant (stored in the succeeding location) into register R0. This instruction is then executed by fetching the data stored at M0001 into register R0. Decode and Execute: Read Da
12、ta into the R0 Register Drive the PC onto the address bus Strobe the RD low On rising edge of RD line, data bus is latched into the R0 register Increment the PCFollowing completion of the instruction R0 = $0010 PC = $0002. Two instruction cycles required for this operation,Execution of the ADD Instr
13、uction,The execution of ADD R0 is implemented as: Fetch: Fetch instruction at M0002= $0000 Decode & Execute: Add R0 to the ACC (accumulator)The execution of other arithmetic and logical instructions is the same.,Execution of the MOVE Absolute,The next instruction is a MOVE ACC to M0200 Fetch: Fetch
14、instruction at M0003= $C018 Decode & Execute: Read data at M0004into Memory Address Register Increment PC Execute: Write data from ACC to memory location pointed to by the Memory Address Register M0004,Drive the Memory Address Register onto the address bus Strobe the WR low On the falling edge of th
15、e WR line the ACC is driven onto data bus On the rising edge of WR line, data bus is latched into the memory Increment the PC,Execution of the MOVE Absolute,The execution of the MOVE M0201 to R7 is implemented as Fetch: Fetch instruction at M0005= $C007 Decode & Execute: Read data at M0006 into Memo
16、ry Address Reg Execute: Write data from memory location pointed to by the Memory Address Reg M0201 into R7,Execution of MOVE Indirect,The execution of the MOVE MR7 to R1 is implemented as follows Fetch: Fetch instruction at M0007= $E001 Decode & Execute: Read data at MR7 into R1,Execution of Program
17、 Control Instructions,The execution of the JLT $C is implemented as follows. Fetch: Fetch instruction at M0008= $1204 Decode & Execute:If ACC 0 Read data at M0009 into PCIf ACC 0 Do nothing,Execution of JSR Instructions,The execution of the JSR $100 1. Fetch: Fetch instruction at M000A= $1300 2. Dec
18、ode & Execute: Read data at M000B into temporary register R7=$100 and increment PC 3. Execute: Push PC on to Stack = $000C 4. Execute: Write temporary register R7 = $000B to PCExecution of NEG is the same as for arithmetic instructions.,Execution of RET,Execution of the RET is implemented as: Fetch:
19、 Fetch instruction at M0101= $1500 Decode & Execute: Pop Stack to PC =$000C,OPERATION OF A BASIC ARCHITECTURE,A Fetch part of the instruction cycle this phase being same for all instructions. Following this the processor enters the Execution phase varies depending on type of operation specified in instruction.Summary : Programs are executed by repeatedly fetching instructions from memory into processor Execution3 buses are used to exchange information with the memory unit : address bus data bus, control bus,Code Segment 1,Code Segment 2,
