1、1. Give a formal or descriptive definition for each of the following terms.（1）、ITRS：International Technology Roadmap for Semiconductor.（2）、Gate-Equivalent：Its used to measure the basic unit of the complexity of the digital circuit, and based on to complete a circuit function, the number of logic gat
2、es are independent of each other.A gate equivalent stands for a unit of measure which allows specifying manufacturing-technology-independent complexity of digital electronic circuit.（3）、Technology Nodes：A Technology Nodes is defined as the ground rules of a process governed by the smallest feature p
3、rinted in a repetitive array.（4）、Feature size：A single graphic minimal size.The minimum scale in integrated circuit devices.roughly half the length of the smallest transistor.（5）、IC design complexity sources：It contains chip size, power dissipation, heterogeneity, variability and reliability.（6）、Beh
4、avioral representation：It represents a design as a black box and describes its outputs in terms of its inputs and times.It indicates no geometrical information or structural information and takes the forms of textual,mathematics,or algorithmic description.（7）、Abstraction hierarchy：Abstraction hierar
5、chies are a human invention designed to assist people in engineering very complex systems by ignoring unnecessary details. A set of interrelated representation levels that allow a system to be represented in varying amounts of detail.（8）、IC design：A design is a set of transformations from one repres
6、entation of a system to another until a representation that can be fabricated exists.Integrated circuit design involves the creation of electronic components, such as transistors, resistors, capacitors and the metallic interconnect of these components onto a piece of semiconductor, typically silicon
7、.（9）、Synthesis ：The process of transforming one representation in the design abstraction hierarchy into another representation.（10）、Refinement：The process of transforming functional representation in the design abstraction hierarchy into geometrical representation.Refinement is a generic term of com
8、puter science that encompasses various approaches for producing correct computer programs and simplifying existing programs to enable their formal verification.（11）、System-level synthesis：It deals with the transformation of an abstract model of behavior into a model consisting of standard functional
9、 units and System-Level Synthesis deals with the concurrent design of electronic applications, including both hardware and software.（12）、 logic synthesis： Translation from data flow representation to a structural logic gate representation.（13）、Layout synthesis：Translation from logic gate representat
10、ion to layout representation.The aims at computing the geometric data, especially the mask layout, from a circuit description in form of a netlist. （14）、Partial design tree：A design has the form of a partial tree. Its behavior is specified at different levels. This situation is encountered become on
11、e frequently wants to evaluate the relationships between system components before they have all been completely designed.（15）、Design window：We mean a range of levels over which the designer works in developing a design-tree structure.（16）、Digital design space：Partitioning was carried out in order to
12、 meet some objective criteria.These criteria are the major factors one has to consider in arriving at a design. （17）、Static timing analysis:Static timing analysis is a simulation method of computing the expected timing of a digital circuit without requiring a simulation of the full circuit.（18）、Beha
13、vioral simulation：also called agent-based simulations, are instrumental in tackling the ecological and infrastructure challenges of our society. These simulations allow scientists to understand large complex systems such as transportation networks, insect swarms, or fish schools by modeling the beha
14、vior of millions of individual agents inside the system（19）、Post place and route simulation：In this step,the gate-level circuit with accurate timing back annotated from the layout is resimulated to check circuit timing and to provide a final check on circuit functionality.Post-place and route simula
15、tion allows you to simulate a design with timing information such as gate delays included, which may illuminate errors in the design that previous steps did not.（20）、Composition-based approach： A new composition-based approach shifts the focus from content creation to the problems of evaluating,inte
16、grating,and verifying multiple pre-existing blocks and software components.2. Access the Internet for information about Daniel D. Gajskis “Y-chart” methodology for integrated circuits design. According to your investigation of the related research papers and/or technical reports, please summarize th
17、e “Y-chart” theory, including (1) design representation domains, (2) design abstraction hierarchy and (3) design activities. References must be listed at the end of your report.Introduction：Y - chart theory put forward by Gajski in 1983, it makes the design becoming visual and distinct. The theory h
18、as been widely used in the VHDL design, and let us make the level of abstract model clearly. Its simple, but every level highly abstract design, the figure is very delicate from different point of view that we can see the entire layout.Although this idea is also very long, but for the design of a va
19、riety of language and use has a long influence.（1）、Design Representation Domains:Behavioral Representation: A domain in which a component is described by defining its input/output response. It represents a design as a black box and describes its outputs in terms of its inputs and times.It indicates
20、no geometrical information or structural information and takes the forms of textual, mathematics, or algorithmic description.At the highest level,the customer is interested in what the chip does and how it is built.Structural Representation: A domain in which a component is described in terms of an
21、interconnection of more primitive components. In this representation,a black box is represented as a set of components and connections.It acts as a bridge between functional and geometrical.No physical information is contained.Geometrical Representation: It specifies size(height and width),the posit
22、ion of each components,each port and connection on the silicon wafer. Geometrical shapes represents regions of diffusion,polysilicon and metal. It includes mask information in its layout file.（2）、Design Abstraction hierarchy:A set of interrelated representation levels that allow a system to be repre
23、sented in varying amounts of detail.A design hierarchy that has five levels:circuit ,logic gate,register transfer, algorithm,system.（3）、Design Activities:Synthesis:The process of transforming functional representation in the design abstraction hierarchy into structural representation.Analysis:The pr
24、ocess of transforming structural representation in the design abstraction hierarchy into functional representation.Refinement:The process of transforming functional representation in the design abstraction hierarchy into geometrical representation.Abstraction:The process of transforming geometrical
25、representation in the design abstraction hierarchy into functional representation.Extraction:The process of transforming structural representation in the design abstraction hierarchy into geometrical representation.Generation:The process of transforming geometrical representation in the design abstr
26、action hierarchy into structural representation.REFERENCES1 James R. Arrastrong，F. Gail Gray，“VHDL Design Representation and Synthesis”2nd ed.，Beijing:China Machine Press，2003.2 Daniel D. Gajski，Robert H.Kuhn，“New VLSI Tools”，IEEE Xplore.Restrictions，11-14,1983.3Todor Stefanov, PaulLieverse Ed Depre
27、ttere, Pieter van der Wolf, “Y-Chart Based System Level Performance Analysis: An M-JPEG Case Study”, IN:PROC.PROGRESS WORKSHOP 2000, UTRECHT,THE NETHERLANDS,OCT 13 2000, PP.113-124.3、Write a summary in Chinese of the paper “A New Ear in Advanced IC Design” (in less than 200 characters).解：SoC 关键技术主要包
28、括总线架构技术、IP 核可复用技术、软硬件协同设计技术、SoC 验证技术、可测性设计技术、低功耗设计技术、超深亚微米电路实现技术。SoC 芯片的规模一般远大于普通的 ASIC,同时由于深亚微米工艺带来的设计困难等,使得 SoC 设计的复杂度大大提高。在 SoC 设计中,仿真与验证是 SoC 设计流程中最复杂、最耗时的环节,约占整个芯片开发周期的 50%80% ,采用先进的设计与仿真验证方法成为 SoC 设计成功的关键。SoC 技术的发展趋势是基于 SoC 开发平台,基于平台的设计是一种可以达到最大程度系统重用的面向集成的设计方法,分享 IP 核开发与系统集成成果,不断重整价值链，在关注面积、延
29、迟、功耗的基础上,向成品率、可靠性、电磁干扰（EMI）噪声、成本、易用性等转移,使系统级集成能力快速发展。 所谓 SoC 技术，是一种高度集成化、固件化的系统集成技术。使用 SoC 技术设计系统的核心思想，就是要把整个应用电子系统全部集成在一个芯片中。在使用 SoC 技术设计应用系统，除了那些无法集成的外部电路或机械部分以外，其他所有的系统电路全部集成在一起。集成电路的发展已有 40 年的历史，它一直遵循摩尔所指示的规律推进，现已进入深亚微米阶段。由于信息市场的需求和微电子自身的发展，引发了以微细加工（集成电路特征尺寸不断缩小）为主要特征的多种工艺集成技术和面向应用的系统级芯片的发展。随着半导
30、体产业进入超深亚微米乃至纳米加工时代，在单一集成电路芯片上就可以实现一个复杂的电子系统，诸如手机芯片、数字电视芯片、DVD 芯片等。在未来几年内，上亿个晶体管、几千万个逻辑门都可望在单一芯片上实现。SoC (System - on - Chip)设计技术始于 20 世纪 90 年代中期,随着半导体工艺技术的发展,IC 设计者能够将愈来愈复杂的功能集成到单硅片上,SoC 正是在集成电路( IC)向集成系统( IS)转变的大方向下产生的。SoC 称为系统级芯片，也有称片上系统,意指它是一个产品，是一个有专用目标的集成电路，其中包含完整系统并有嵌入软件的全部内容。同时它又是一种技术，用以实现从确定系统功能开始，到软/硬件划分，并完成设计的整个过程。
