1、基于FPGA和CMX589A的GMSK调制器设计与实现关明辉,聂null 伟(vY“d Lnullnull 100029)Knull1:GMSK信号具有很好的频谱和功率特性,特别适用于功率受限和信道存在非线性a衰落以及多普勒频移的移动突发通信系统b根据GMSK调制的特点,提出了一种以FPGA和 CM X589A为硬件载体的 GMSK调制器的设计方案,并给出了方案的具体实现,包括系统结构a利用CMX589A实现的高斯滤波器aFPGA实现的调制指数为 0. 5的 FM 调制器以及控制器b对系统功能和性能测试结果表明,指标符合设计要求,工作稳定可靠b1oM:GMSK; DDS;FM调制器; FPGA
2、ms |:TN761.2 null null null null nullDS M :B null null null null nullcI|:1004 373X( 2008)11 146 04Design and Realization of GMSK Modulator Based on FPGA and CMX589AGUAN Minghui, NIE Wei( Telecommunication System Lab,Beijing University of Chemical Technology, Beijing, 100029,China)Abstract: As a band
3、width efficient and power efficient modulation method, Gaussian Minimum Shift Keying( GMSK) isimportant for power limited digital mobilecommunication systems having nonlinear channel with fading and Doppler frequencyshift.This paper presents a new design and realization of GMSK modulator based on FP
4、GA and CMX589A after thinking outof characteristic of GM SK modulation,including the system structure,CMX589A to realize Gaussian filter,frequency modula-tor based on FPGA and microcontroller. The functions and performance of system are tested, and the results validate theapproach and work reliable.
5、Keywords: GMSK;DDS; Frequency Modulator;FPGAl : 2007 11 16 “: Ly !1nullnullGMSKZ T z q +, ?, ? MY/ # 1 p,yNGSMaETS HiperLAN1#GPRS“dSZ Tb“ -GMSK/ 1 LCZE,B GMSK ASIC , FX589CMX909 MC2833FX019 LCGMSK 1, 2b LCZE+ LCea| qV e,o q%, V Zb 6BZE qL XZEFPGADSP LCb LC m ,B s| ro Yss s s,YV FM LC 3, 4 ; 6B qE,YV
6、“ ro YEi ROMTsV, YVFM LC 5 7b qL X LCGMSKZE VM, q !9 #Y roaMs f , 4a LCb8 ,4BCMX589AFPGAGMSK !9Zb.dLCZE1 LCea ZL V e qg +, aCDPDa_Y“d,1C Lilb2null“dq !9“dq1 s: e # Zo AA U va ro v,#FPGA v,“dqm m1 Ub“dTV /:“dF, FPGA S,LCD 4 U e, H“d % q?o,V “dT;YV e4 U,Vo e( | q, ro “d , BT# o q);eYV e ? ro v# v; FPG
7、A v lA/D | e q3V7|b1460/ 1 :FPGACMX589AGMSK !9 LC图1null 系统硬件结构图2.1null 高斯滤波器模块设计 ro vCML 3CMX589A“ , z| l qb !9,CMX589A4 q,sY25null576 MHz8null192 MHz,YVKL ebCMX589A e P2 gM e ro ,ClkDivAaClkDivB H % ro q, ! V1 UbBT e ro “d z, !null 1null H,“dBT0null5; !null 0null H, BT0. 3b ro TV: n5 “d1 ! ro q zBT
8、, Tx Data 1 |, HTx Enable ,YVTx OutV l ro|bV1null| q !输入 25null576 MHz 8null 192 M HzClk DivA Clk DivB 基带码元速率/kb/s0 0 192 640 1 96 321 0 48 161 1 24 82.2null 调制指数为0.5的FM发射机设计 ? FPGA A/DaD/A LCbFPGACyclone“ EP1C6Q240C8, SRAM/FPGA bA/DTI 38 TLC5510, D/A510 THS5651A, q b ? “d H20 MHz, H4D/A THS5651AT H
9、bA/D HFPGA4,“d HVs4A/D 1 MHzT Hb H P3 gYV2 b q e1 bnull P ?null eFPGAM e 4 q,sY20 kHz, 200 kHz, 2 MHz20 MHz, q ! V2 Ubo q !20 MHz H,“dT H1YVFPGA =PLL LCb2.3null 单片机控制器设计e AT89C51 , LCD, 4* 4 o ,iYV g P0P1M , P2g ro eLM , P3 gFPGAM e? qbV2null q !P3.2(控制位) P3. 1 P3. 0 中心频率0 null null 20 kHz1 00 20 kH
10、z1 01 200 kHz1 10 2 M Hz1 11 20 M Hzo ) #LCDA U v: o LC g, v o a a # ?o|)b 1 “d ,iYVLCDA U A U -| ,V7 P“d V Tb ? ! v:N v3) o , 74M“d ( | qaFM q)bV3V U ro vT H8null192 MHz H, e ro“d !bV3null ro !P2. 2 P2. 0 数据速率 /kb/s 系统带宽(BT 值)000 64 0. 3001 32 0. 3010 16 0. 3011 8 0. 3100 64 0. 5101 32 0. 5110 16 0
11、. 5111 8 0. 53null“d q !9“d qI1 s: e vFPGA LC 0. 5FM vb“dq m m2 Ub图2 null 系统软件流程图3.1 null 单片机软件设计e v1 Z o aLCDAA Ua147nullC0/ null2008 M11 9274 null null0/ null eb e “dTV /: S, LCDA U 7 S, null ro !nullnull FM !null ; null ro !null0, null“d z!nullnull q !null,sY V !2ro z8 q, “d !P2g e; null !null0 !
12、nullo qnull, V ! o q,iYVP3 g eFPGAo qb3.2null 调制器的系统实现FM DDS XFPGA LCbDDS(Direct Digital Frequency Synthesizer, 3 q) B q/ , qsOq, V LC y q MbDDS“d1“d HaM F a?osVaD/A Yro F,“d m3 Ub M F DDS“d, NFE NM7i Fb B I H , NFE | q e3 M MF,MFT M7i bM7i BZ | M Q FE , PFE ? H T/? q e3MF, 6BZ | M Toi%V boi%V M o ,
13、KVDACY ro E| 8b图3null DDS系统结构 !920 MHzT H,“d40M F ,# q39 |40, “d qsO q / T U:nullf = f c/ 2M = 20 MHz/ 240= 1null82 null 10- 5 Hznull null“d q:f out = nullf null f wordnull null FM q “d !91ob !| q8 kHz,o q200 kHz( f word= null 10995116277null), LC 0null5FM , FM q4 kHzbFPGA 8A/D |4M q3,V7 e | q ?bo q
14、A/D a_in= null 1000 0000null;A/D 0 V(a_in= null 0000 0000null) H,| q198 kHz ( f word =null 10885165114null) ;A/D Y2 V(a_in= null 1111 1111null) H, q202 kHz( f word= null 11105067440null)b qV198 kHz202kHzs255z,M q40 q3,5A/D 256256 q3BBb B“d H , q e340M F MFTi M F bROMsVL10, |M F 10T?sVb?sV Cy-clone =
15、ROM vsV !9,310, DAC M b“d | q3 /:U3: fm_frerom port map( address= a_in, clock= CLK,q= fwout);PROCESS( CLK)BEGINnull IF CLKEVENT AND CLK= 1THENnull null null IF a_in “01111111“ THENnull fword = f_mid+ fwout;null ELSEnull null null fword = f_mid- fwout;null end if;null End if;End process;, f_mid| q, f
16、m_freromA/D | W 1“,“d l|MM| V7 ?b4null“d q_# k4.1 null 软件仿真 !9 EDA Quartusnull6. 0 qI,YVIr q_ m4 U, clk“d H, addr40M F , a_inA/D 8 |, fword“d q3, foutoV |b图 4null 调制器的软件仿真4.2 null 系统测试与分析“d kYVIFR2399A N “dq kbm5V UMq LCMSK m,m6V UGMSK mb1 m V1480/ 1 :FPGACMX589AGMSK !9 LC?C,F ro , GMSK FX, h91 yMSK
17、b H kT V A, o200 kHz, z# h sTMb图5 null MSK调制信号频谱图图6null GMSK调制信号频谱图5nullnull LC BCMX589AFPGAGMSK b“d V T, e LCGMSK “d e, CMX589A v| ro, FM 3 q/ (DDS)FPGAq LC,“dK q25 MHzb H“d z| 2 V e+,i O X Zo3 4 Jb kTV ,X| , !91 p, aCDPD,_Y“db参null 考null 文null 献1Rk.CMX909B . !9 LCJ .0 !9,2005(2): 114-115.2R. ro LC
18、/ J.C0/ ,2006,29(15) :41-45.3,( ,.BGMSK| 3ZE J.0,2005,33( 6) :1 095-1 098.4, . Kl Mo e LCZE_J.L,2006, 36( 3) :32-34.5 ,.B qLGMSK|ZT LCJ.Y,2007, 20( 3) :14-16.6:, ,u . qLGMSK LCJ.,2005, 24(12): 25-27.7vZ.DSPRF ASIC GFSK J./ ,2006, 46( 2) :106-110.8W 3, Zb. DDS/ Y !9FP-GA LCJ.C0/ ,2006, 29(10) :103-10
19、5.Tenull 关明辉null 男,1982年出生,辽宁省大连市人,硕士研究生b主要研究通信系统中调制解调器的实现b聂null 伟null 男,1960年出生,山西省太原市人,博士,副教授b主要研究移动通信,计算机应用技术b(上接第145页)PC?USB IPSOFbrxdprx_dn 1 g g c v|, VB m1 UD+D-M bm V A,null 85null l H, rxdprx_dnoV l PC?V fs_clk H null SE0nullV U |b图5null ChipScope Pro 软逻辑分析仪抓到的SOF包5nullnullUSB IP !9 H, s I
20、n V, USB VM Zb H “ -SoCWishBone9LAMBA ASB9L !9 9La ,8 -M1l V SoCbUSB IP L= “,MCU# IP“B “SoC , “SoCX)m_ ,| b参null 考null 文null 献 1f. USB g !9 M .:0 S/v,2002. 2 CollM H, Gardiner C. Principles of IP-based design IP Fo-rum Munich, 2001. 3 AMBA specification, Revision 2. 0 ( 1999). http: / . 4 Silicore Corporation. WISHBONE System-on- Chip(SoC) In-terconnection Architecture for Portable IP CoresRevision,2001. 5 Universal serial bus specification, Revision 1. 1. ( 1998) . ht-tp:/ www.usb. org.Tenull 朱文波null 男,1981年出生,安徽黄山人,在读研究生b主要研究方向为VLSI设计与EDA技术b149nullC0/ null2008 M11 9274 null null0/ null
