1、2-40APPENDIX AEstimating MOSFET Parameters from the Data Sheet(Equivalent Capacitances, Gate Charge, Gate Threshold Voltage,Miller Plateau Voltage, Internal Gate Resistance, Maximum Dv/Dt)In this example, the equivalent CGS, CGD, and CDScapacitances, total gate charge, the gate thresholdvoltage and
2、Miller plateau voltage, approximate internal gate resistance, and dv/dt limits of an IRFP450MOSFET will be calculated. A representative diagram of the device in a ground referenced gate driveapplication is pictured below.VDRVDSGRHIRGATERG,ICGDCGSCDSRLOIRFP450IDVDS,offThe following application inform
3、ation are given to carry out the necessary calculations:VDS,OFF=380V the nominal drain-to-source off state voltage of the device.ID=5A the maximum drain current at full load.TJ=100C the operating junction temperature.VDRV=13V the amplitude of the gate drive waveform.RGATE=5 the external gate resista
4、nce.RLO=RHI=5 the output resistances of the gate driver circuit.A1. CapacitancesThe data sheet of the IRFP450 gives the following capacitance values:Using these values as a starting point, the average capacitances for the actual application can beestimated as:2-41Equations: Numerical Example:offDS,s
5、pecDS,specOSS,aveOSS,offDS,specDS,specRSS,aveRSS,VVC2CVVC2C=369pF380V25V720pF2C174pF380V25V340pF2CaveOSS,aveRSS,=The physical capacitor values can be obtained from the basic relationships:aveRSS,aveOSS,DSRSSISSGSaveRSS,GDCCCCCCCC=195pF174pF369pFC2260pF340pF2600pFC174pFCDSGSGD=Notice that CGSis calcu
6、lated from the original data sheet values. Within one equation, it is important touse capacitor values which are measured under the same test conditions. Also keep in mind that CGSisconstant, it is not voltage dependent. On the other hand, CGDand CDScapacitors are strongly non-linearand voltage depe
7、ndent. Their highest value is at or near 0V and rapidly decreasing as the voltageincreases across the gate-to-drain and drain-to-source terminals respectively.A2. Gate chargeThe worst case gate charge numbers for a particular gate drive amplitude, drain current level, and drainoff state voltage are
8、given in the IRFP450 data sheet.Correcting for a different gate drive amplitude issimple using the typical Total Gate Charge curve asillustrated on the left.Starting from the 13V gate-to-source voltage on theleft hand side, find the corresponding drain-to-source voltage curve (interpolate if not giv
9、enexactly), then read the total gate charge value on thehorizontal axes.If a more accurate value is required, the differentgate charge components must be determinedindividually. The gate-to-source charge can beestimated from the curve on the left, only the correctMiller plateau level must be known.
10、The Millercharge can be calculated from the CRSS,AVEvalueobtained in A1. Finally, the over drive chargecomponent raising the gate-to-source voltage fromthe Miller plateau to the final amplitude should beestimated from the graph on the left again.13V122nC2-42A3. Gate threshold and Miller plateau volt
11、agesAs it was already shown in A2, and will be demonstrated later, several MOSFET switchingcharacteristic are influenced by the actual value of the gate threshold and Miller plateau voltages. Inorder to calculate the Miller plateau voltage, one possibility would be to use the gate-to-source threshol
12、dvoltage (VTH) and transconductance (gfs) of the MOSFET as listed in the data sheet.Unfortunately, the threshold is not very well defined and the listed gfsis a small signal quantity. A moreaccurate method to obtain the actual VTHand Miller plateau voltages is to use the Typical TransferCharacterist
13、ics curves of the data sheet.From the same temperature curve, pick two easy toread points and note the corresponding draincurrents and gate-to-source voltages. Select thedrain current values to correspond to vertical gridlines of the graph, that way the currents can be readaccurately. Then follow th
14、e intersections to thehorizontal axes and read the gate-to-source voltages.Starting with the drain currents will result in higheraccuracy because the gate-to-source voltage is on alinear scale as opposed to the logarithmic scale indrain current. It is easier to estimate Vgs1 and Vgs2on the linear sc
15、ale therefore the potential errors aremuch smaller.For this example, using the 150C curve:5.67VV20AI4.13VV3AIGS2D2GS1D1=The gate threshold and Miller Plateau voltages can be calculated as:()()()KIVVVVIKIIIVIVVVVKIVVKILOADTHMillerGS,2THGS1D1D1D2D1GS2D2GS1TH2THGS2D22THGS1D1+=()4.413V3.1695A3.157VV3.16
16、93.157V4.13V3AK3.157V3A20A3A5.67V20A4.13VVMillerGS,2TH=+=ID1ID2VGS1VGS2Typical Transfer Characteristics2-43These values correspond to 150C junction temperature, because the 150C curve from the TypicalTransfer Characteristics was used. Due to the substantial temperature coefficient of the thresholdvo
17、ltage, the results have to be corrected for the 100C operating junction temperature in this application.The gate threshold voltage and the Miller plateau voltage level must be adjusted by:()TCC150TVJADJ= () 0.35VCV0.007C150C100VADJ+=Gf7Gf8Gf6Ge7Ge8Ge6=A4. Internal gate resistanceAnother interesting
18、parameter is the internal gate mesh resistance (RG,I), which is not defined in the datasheet. This resistance is an equivalent value of a distributed resistor network connecting the gates of theindividual MOSFET transistor cells in the device. Consequently, the gate signal distribution within adevic
19、e looks and behaves very similar to a transmission line. This results in different switching times ofthe individual MOSFET cells within a device depending on the cells distance from the bound pad of thegate connection.The most reliable method to determine RG,Iis to measure it with an impedance bridg
20、e. The measurementis identical to the ESR measurement of capacitors which is routinely carried out in the lab. For thismeasurement the source and drain terminals of the MOSFET are shorted together. The impedanceanalyzer should be set to RS-CSor if it is available RS-CS-LSequivalent circuit to yield
21、the componentvalues of the equivalent gate resistor, RG,I, the MOSFETs input capacitance, CISSand the series parasiticinductance of the device, all connected in series.For this example, the equivalent component values of an IRFP450 were measured by an HP4194impedance analyzer. The internal gate resi
22、stance of the device was determined as RG,I=1.6. Theequivalent inductance was measured at 12.9nH and the input capacitance was 5.85nF.A5. dv/dt limitMOSFET transistors are susceptible to dv/dt induced turn-on only when their drain-to-source voltagerises rapidly. Fundamentally, the turn-on is caused
23、by the current flowing through the gate-draincapacitor of the device and generating a positive gate-to-source voltage. When the amplitude of thisvoltage exceeds the gate-to-source turn-on threshold of the device, the MOSFET starts to turn-on. Thereare three different scenarios to consider.First, loo
24、k at the capacitive divider formed by theCGDand CGScapacitors. Based on these capacitorvalues the gate-to-source voltage can be calculatedas:GDGSGDDSGSCCCVV+=If VGS CBST, the bootstrap capacitor can be recharged to the full VDRVlevel. Usually, CDRVis an orderof magnitude larger capacitance than CBST
25、. When selecting the value of the low side bypass capacitor,primarily the steady state operation should be considered. Accordingly,BST,1DRVC10C , which requiresCDRV= 2.2F.2-48APPENDIX DCoupling Capacitor and Transient Settling Time CalculationIn this example the coupling capacitor and gate-to-source
26、 resistor value of an AC coupled gate drivecircuit will be calculated. The design goal is to provide a 3V negative bias for the MOSFET during itsoff time. The application circuit is shown below:RGSVCCOUTGNDVDRVPWMcontrollerCC+VDRVVDRV-VCL0V-VCL-VCLCDRVVC+ -VINThe following application information is
27、 given:dVIN/dt=200V/ms the maximum dv/dt of the input voltage during power up, limited by the combinedeffect of the inrush current limiting circuit and the input energy storage capacitor.CGD,0=1nF the maximum gate-to-drain capacitance of the MOSFET read from the data sheetat 0V drain-to-source volta
28、ge (worst case start-up condition).VTH=2.7V the gate-to-source turn-on threshold TA,MAX.VDRV=15V the supply voltage of the PWM controller, i.e. the gate drivers bias voltage.fDRV=100kHz the switching frequency.DMAX=0.8 maximum duty ratio, limited by the PWM controller to reset the transformer.VCL=3V
29、 the negative bias amplitude.VC=1.5V maximum allowable ripple of the coupling capacitor.QG=80nC total gate charge of the MOSFET .=100s transient time constant for the coupling capacitor voltage (VC). This is the start-uptime constant as well to establish the initial value of VC.The design starts by
30、determining the maximum value of the gate pull down resistor. During power-up,RGSmust be low enough to keep the MOSFET off. When the voltage rises across the drain-sourceterminal, the CGDcapacitor is charged and a current proportional to dVIN/dt flows through RGS. TheMOSFET stays off if the voltage
31、drop across RGSremains below the gate threshold. Therefore, themaximum allowable RGSvalue is:dtdVCVRINGD,0THMAXGS,= 13.5ksV2000001nF2.7VRMAXGS,=2-49The next step is to find the common solution for the required time constant and ripple voltage. The twoequations are:D(D)VDVfVfQCRCCDRVDRVCDRVGCGSC+=whe
32、re VC(D) is the coupling capacitor voltage as a function of the duty ratio. The second equation canbe evaluated right away since all parameters are defined. In general, VC(D)=DVDRVif the clamp circuitis not used, and the expression has a local maximum at D=0.5, which gives the minimum couplingcapaci
33、tor value. In this application, the coupling capacitor voltage is limited to 3V by the zener clamp.Thus for D0.2, the coupling capacitor voltage is constant, and VC=3V. Consequently, the maximumvalue of the second equation is not at D=0.5, but rather at the maximum duty cycle, DMAX.Before calculatin
34、g CC, another important limitation should be pointed out. In order to arrive at ameaningful positive capacitor value, the denominator of the second equation must be positive which setsa limit on the transient time constant. This limit is:()DRVCCDRVMINfV(D)VVD=This function has a maximum value at D=0
35、.5 if the clamp circuit is not used. With the clamp circuit,D=DMAXwill define the fastest possible transient response of the coupling capacitor voltage.Substituting the application parameters and using the appropriate equation for the clamp case yields thefollowing values:()DRVCCLDRVMAXMINfVVVD=()s6
36、4kHz100V5.1V3V158.0MIN =()CLDRVMAXDRVCDRVGCVVDfVfQC= ()nF148V3V158.0kHz100s100V5.1kHz100s100nC80CC=CGSCR= 675nF148s100RGS=These results are acceptable because MINRGS, therefore all conditions are met. Theworst case power dissipation of RGSis 173mW at the maximum duty ratio of 0.8. If this value is n
37、otacceptable, selecting a longer time constant will increase the pull down resistor value. At the same timethe power dissipation and the coupling capacitor value will decrease.The last calculation is to compute the bypass capacitor value. Assuming a maximum of 1V ripple on thebias rail (VDRV=1V) the
38、 following minimum bypass capacitance value will result:MAXDRVGSDRVCLDRVDRVGDRVDfRVVVVQC += 222nF0.8100kHz6751V3V15V1V80nCCDRV=+=2-50APPENDIX EGate Drive Transformer Design ExampleThe gate drive transformers for a phase shifted full-bridge converter will be designed according to theschematic diagram
39、 below:VDRVVCCOUTDGNDPhase ShiftPWM controllerOUTCOUTBOUTAVINTDRVTDRVIn this example, the PWM controller has four high current output drivers on-board. The gate drivetransformer design is based on the following application information:fCLOCK=400kHz the clock frequency.fDRV=200kHz the operating frequ
40、ency of the gate drive transformers.DMAX=0.5 maximum duty ratio of the gate drive transformer.VDRV=15V the bias voltage of the controller, which is also used to power the output drivers.The first task is to choose the core size. A seasoned designer can pick the right core for the first trybased on p
41、revious experience. But even then, like all magnetics problem solving, the gate drivetransformer design might require a couple of iterations. For this application a Ferroxcube RM5/I corewas selected with no airgap. The preferred choice of material is 3C94 because it has the highestpermeability and l
42、owest loss at 200kHz from the available selection.Ae=24.8mm2effective cross section area of the core.Ve=574mm3effective volume of the core.BSAT=0.35T saturation flux density of the ferrite material 100C.AL=2H/turns2equivalent inductance per turns square.BPEAK=0.1T peak flux density in steady state o
43、peration. Remember, that during transientoperation the transformers flux can walk due to uneven duty cycles. Usually, a3:1 margin is desirable.B=0.2T peak-to-peak flux density in steady state operation.2-51Check the core loss under these conditions from the data sheet.PV=200kW/m3effective volumetric
44、 power dissipation of 3C94 BPEAK=0.1T and 200kHz.(it is more meaningful to convert to 0.2mW/mm3.)eVCOREVPP = 115mW574mmmmmW0.2P33CORE=The power dissipation of the RM5/I core is 115mW which is acceptable. Next, calculate the primarynumber of turns according to:DRVeMAXDRVPfABDVN= 7.56200kHz24.8mm0.2T0
45、.515VN2P= turnsThe next higher full turn is selected, NP=8 turns. Since voltage scaling is not required in this gate drivetransformer, the two secondary windings have 8 turns as well. In order to minimize leakage inductanceand AC winding resistance, each winding should occupy a single layer only. Th
46、e following data isneeded to execute the winding design:WW=4.7mm the winding width from the data sheet of the coil former.MLT=24.9mm the average length of turn also from the coil former data sheet.Considering that at the termination N+1 wires are side by side, the corresponding wire diameter is:1NWd
47、PWW+= 20.5mils0.52mm94.7mmdW=The closest smaller diameter wire size according to the American Wire Gauge table is #25 and itscharacteristic data is:dW=0.0199mils heavy built (double isolated) nominal diameter. (0.0199mils=0.506mm)W=32.37/1000ft. normalized wire resistance. (32.37/1000ft =0.1062m/mm)
48、The DC winding resistance is:WPDCW,MLTNR = 21.2mmmm0.106224.9mm8RDCW,=Next, check the AC resistance based on Dowells curves according to the following steps:DRVPENf7.6D = cm017.02000006.7DPEN=PENWDd0.83Q= 2.470.17mm0.506mm0.83Q =Entering Dowells graph at Q=2.5, the single layer curve gives an RAC/RD
49、C=3 ratio, thus the ACresistance of the winding is RAC=321.2m=63.6m, which is quite acceptable.2-52The last step is to calculate the magnetizing inductance and current values:2LMNAL = H1288turnsH2L22M=DRVMMAXDRVMPM,fLDV212II= mA146kHz200H1285.0V1521IM,P=3DIIMAXPM,RMSM,= 60mA30.5146mAIRMSM,=Based on the RMS value of the magnetizing current, the wire loss is:AC2RMSM,WRIP = 0.2mW63
