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acer 4535G LA_4921P KBLG0图纸.pdf

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1、AABBCCDDEE1 12 23 34 4TitleSize Document Number RevDate: Sheet ofSecurity Classification Compal Secret DataTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTOD

2、Y OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.Issued Date Deciphered DateKBLG0 LA-4921P 0.1Cover P

3、ageB1 57Wednesday, March 11, 20092008/10/06 2009/10/06Compal Electronics, Inc.AMD Puma : Griffin Processor with RS780MN/SB700/M92-M2 XTKBLG0 Schematics DocumentREV:1.0Compal Confidential2009-03-11Tigris : Caspian Processor with RS880M/SB710/M92-M2 XTAABBCCDDEE1 12 23 34 4TitleSize Document Number Re

4、vDate: Sheet ofSecurity Classification Compal Secret DataTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEP

5、T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.Issued Date Deciphered DateKBLG0 LA-4921P 0.1Block DiagramsB2 57Wednesday, March 11, 20092008/10/06 20

6、09/10/06Compal Electronics, Inc.Power On/Off CKT.Touch Padpage 41CRT LPC BUSpage 42Compal ConfidentialuFCBGA-528page 26MDC 1.5Connpage 43Int.KBDpage 39USBconn X 2A link Express2DC/DC Interface CKT.AMD S1G2 Processorpage 383.3V 48MHzHyper Transport Link16 x 16page 38EC I/O BufferFan ControlPower Circ

7、uituPGA-638 Packagepage 41page 45ATI RS780MNBIOSpage 4,5,6,7page 39HD Audiopage 44page 10,11,12,13ATI SB700page 27,28,29,30,31page 39ENE KB926LCD (LED BL)BluetoothConn3.3V 24.576MHz/48MhzModel Name : KBLG0RTC CKT.page 26page 24page 43page 46,47,48,49,50,5152,53,54S-ATApage 32SATA HDDConn.port 0CMOSC

8、ameraUSB port 0,6USBCDROM Conn.page 32FingerprinterAES1610Mini card(WL)X1page 25 PCI-Express 1xport 1USB port 3 USB port 12 USB port 13 USB port 8page 36,37 page 27 page 37 page 36 page 36page 34MINI Card x1WLANpage 36port 3port 25 in 1 socketpage 33page 33port 4RJ45page 35Dual Channel BANK 0, 1, 2,

9、 3200pin DDRII-SO-DIMM X21.8V DDRII 667/800Memory BUS(DDRII)page 8,9Clock GeneratorSLG8SP626VTRpage 6 page 23Thermal SensorADM1032Atheros AR8131LAN(GbE) Card ReaderJMB385page 37ESATA Conn.ATI M92-M2 XTVRAM 512MB64M16 x 4PCI-Express 16xDDR2 500MHzpage 19, 20Page 14,15,16,17,18,21,22uFCBGA-528uFCBGA-9

10、62HDMI Conn.HDA CodecALC888Audio AMPPhone Jack x3Digital MICpage 40LEDpage 42page 39LID SW / MEDIA/Bport 2USB port 1Gen2PowerXpress (MUX)MUX(1:2)MUX(1:2)5 in 1 socketpage 33page 33Card ReaderRTS5159USB port 4option2option1GriffinuFCBGA-528ATI RS880MuFCBGA-528ATI SB710uPGA-638 PackageAMD S1G3 Process

11、orCaspianTigris PumaAABBCCDDEE1 12 23 34 4TitleSize Document Number RevDate: Sheet ofSecurity Classification Compal Secret DataTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF

12、ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.Issued Date Deciphered DateKBLG0

13、 LA-4921P 0.1Notes ListB3 57Wednesday, March 11, 20092008/10/06 2009/10/06Compal Electronics, Inc.STATE SIGNALFull ONS1(Power On Suspend)S3 (Suspend to RAM)S4 (Suspend to Disk)S5 (Soft OFF)SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS ClockONONONONONONON ONONONONOFFOFFOFFOFFOFFOFFOFFOFFLOWLOW LOW LOW

14、 LOWLOWLOWLOWLOWLOWLOWHIGH HIGH HIGH HIGHHIGHHIGHHIGHHIGHHIGHHIGHBoard ID / SKU ID Table for AD channelVcc 3.3V +/- 5%100K +/- 5%Ra/Rc/ReBoard ID Rb / Rd / Rf V min012308.2K +/- 5%0 V0.216 V 0.250 V 0.289 V0.436 V0.712 V0.503 V0.819 V0.538 V0.875 VAD_BID V typAD_BID VAD_BID max18K +/- 5%33K +/- 5%56

15、K +/- 5%100K +/- 5%200K +/- 5%3.300 V0 V 0 V4567 NC1.036 V1.453 V 1.650 V 1.759 V1.935 V2.500 V2.200 V3.300 V2.341 V1.185 V 1.264 VBoard ID01234567PCB Revision0.1BOARD ID Table BTO Option TableBTO Item BOM StructureDiscreteUMA UMAVGA0.20.31.01101 001XbOFF OFF+0.9V 0.9V switched power rail for DDR te

16、rminator+RTCVCC RTC power+1.5VS+1.8VS 1.8V switched power rail+2.5VS+5VS+3VS+5VALW+1.8V2.5V for CPU_VDDA+3VALW1.8V power rail for CPU VDDIO and DDR3.3V always on power rail5V always on power rail3.3V switched power rail5V switched power rail+VSB VSB always on power rail ON ON*ONONONONEC SM Bus1 addr

17、essDeviceSB700 SM Bus 1 addressONOFFOFFDDR DIMM1 1001 000XbDDR DIMM2 1001 010Xb1.5V power rail for PCIE Card+CPU_CORE_0SB700 SM Bus 0 addressDeviceClock Generator(SILEGO SLG8SP626)AddressAddress AddressVoltage RailsVINB+1.1VSAdapter power supply (19V)AC or battery power rail for power circuit.Core v

18、oltage for CPU (0.7-1.2V)External PCI DevicesDevice IDSEL# REQ#/GNT# InterruptsON+VGA_CORE OFFOFFON1.1V switched power rail for NB VDDC & VGAON+CPU_CORE_1 Core voltage for CPU (0.7-1.2V) ON OFF OFF+CPU_CORE_NB Voltage for On-die Northbridge of CPU(0.8-1.1V) ON OFF OFFADI ADM1032 (CPU)+1.2V_HT 1.2V s

19、witched power rail ON OFF OFFON ON*ON OFF OFF+3V_LAN 3.3V power rail for LAN ON ON ONS1 S3 S5ON OFFONN/A N/A N/AN/AN/AN/APower Plane DescriptionEC SM Bus2 addressDeviceSmart BatteryOFFOFFONOFFOFFOFFONNote : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.OFFON

20、ONONONOFFON*OFFOFFONNew cardDevice AddressON1001 100X b0001 011X b0.95-1.2V switched power railHEX98H9AHGMT G781-1 (GPU) 1001 101X b16HHEXD2HEX9094Mini cardM92M92-M2 XTVRAM STRAP VRAMLAN 8121 8121LAN 8131 8131PX_GPIO0XLVDS / CRTPowerXpress modePX_GPIO2DISPLAY OUTPUTPX_GPIO1IGP only modeRS780MNSB700

21、SB700dGPU_ResetFunction Description dGPU_PWR_Enable PX Mode SwitchXXH : EnableH : Enable L : iGPU(DC) / H : dGPU(AC)PX_GPIO1XPowerXpress modePX_+3VSPX_GPIO2IGP only modeKB926Enable +1.1VS_PXFunction Description PX MODE SWITCH Enable +3VS_DELAYXXH : Enable Reserved H : EnableXPX_+1.8VSEnable +1.8VS_P

22、XPX_+VGA_COREXEnable +VGA_COREH : EnablePX_GPIO1_SBPowerXpress modePX_GPIO2_NBIGP only modeKB926Trigger from SB to Enable (PX_GPIO1/PX_+3VS/PX_+1.8VS/PX_+VGA_CORE)Function DescriptionXXH : EnableReservedTrigger from SBHDT debug HDTH : Enable9CHSB-Temp SensorJMB385 CR JMB385RTS5159 CR RTS51590.4FOR T

23、IGRIS TIGRISFOR PUMA PUMAFOR TEST UBAABBCCDDEE1 12 23 34 4H_CADIN1H_CADIN0H_CADIP3H_CADIN2H_CADIP2H_CADIP1H_CADIN3H_CADIP4H_CADIN5H_CADIN4H_CADIP5H_CADIN6H_CADIN8H_CADIN7H_CADIN9H_CADIP8H_CADIP6H_CADIP7H_CADIN10H_CADIP10H_CADIN11H_CADIP11H_CADIP9H_CADIN13H_CADIN12H_CADIP14H_CADIP12H_CADIN14H_CADIP0H

24、_CADIN15H_CADIP15H_CADIP13H_CADON15H_CADOP13H_CADON2H_CADON3H_CADON9H_CADON6H_CADON0H_CADOP11H_CADOP8H_CADOP6H_CADON13H_CADOP1H_CADOP2H_CADOP4H_CADOP5H_CADON12H_CADON7H_CADON5H_CADON10H_CADON8H_CADON4H_CADON1H_CADOP12H_CADOP15H_CADOP9H_CADOP10H_CADOP14H_CADOP7H_CADOP3H_CADOP0H_CADON14H_CADON11H_CADI

25、N015H_CADOP015H_CADON015H_CADIP015H_CADON015 10H_CADIN01510H_CADOP015 10H_CLKIN010H_CLKIN110H_CLKIP110H_CTLIN110H_CLKIP010H_CTLIP110 H_CTLOP1 10H_CLKOP1 10H_CADIP01510H_CLKOP0 10H_CLKON0 10H_CLKON1 10H_CTLON1 10H_CTLOP0 10H_CTLON0 10H_CTLIN010H_CTLIP010+1.2V_HT+1.2V_HT+1.2V_HTTitleSize Document Numb

26、er RevDate: Sheet ofSecurity Classification Compal Secret DataTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT

27、EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.Issued Date Deciphered DateKBLG0 LA-4921P 0.1AMD CPU S1G2 HT I/FCustom4 57Wednesday, March 11, 20

28、092008/10/06 2009/10/06Compal Electronics, Inc.250 milNear CPU SocketVLDT CAP.VLDT=1.5AChange as 10Ufor TigrisChange as 10Ufor TigrisC7260.22U_0603_16V4Z12C664 4.7U_0805_10V4ZPUMA1 2HT LINKJCPU1A6090022100G_B connVLDT_A3D4VLDT_A2D3VLDT_A1D2VLDT_A0D1VLDT_B3 AE5VLDT_B2 AE4VLDT_B1 AE3VLDT_B0 AE2L0_CADI

29、N_H15N5L0_CADIN_L15P5L0_CADIN_H14M3L0_CADIN_L14M4L0_CADIN_H13L5L0_CADIN_L13M5L0_CADIN_H12K3L0_CADIN_L12K4L0_CADIN_H11H3L0_CADIN_L11H4L0_CADIN_H10G5L0_CADIN_L10H5L0_CADIN_H9F3L0_CADIN_L9F4L0_CADIN_H8E5L0_CADIN_L8F5L0_CADIN_H7N3L0_CADIN_L7N2L0_CADIN_H6L1L0_CADIN_L6M1L0_CADIN_H5L3L0_CADIN_L5L2L0_CADIN_

30、H4J1L0_CADIN_L4K1L0_CADIN_H3G1L0_CADIN_L3H1L0_CADIN_H2G3L0_CADIN_L2G2L0_CADIN_H1E1L0_CADIN_L1F1L0_CADIN_H0E3L0_CADIN_L0E2L0_CADOUT_H15 T4L0_CADOUT_L15 T3L0_CADOUT_H14 V5L0_CADOUT_L14 U5L0_CADOUT_H13 V4L0_CADOUT_L13 V3L0_CADOUT_H12 Y5L0_CADOUT_L12 W5L0_CADOUT_H11 AB5L0_CADOUT_L11 AA5L0_CADOUT_H10 AB4

31、L0_CADOUT_L10 AB3L0_CADOUT_H9 AD5L0_CADOUT_L9 AC5L0_CADOUT_H8 AD4L0_CADOUT_L8 AD3L0_CADOUT_H7 T1L0_CADOUT_L7 R1L0_CADOUT_H6 U2L0_CADOUT_L6 U3L0_CADOUT_H5 V1L0_CADOUT_L5 U1L0_CADOUT_H4 W2L0_CADOUT_L4 W3L0_CADOUT_H3 AA2L0_CADOUT_L3 AA3L0_CADOUT_H2 AB1L0_CADOUT_L2 AA1L0_CADOUT_H1 AC2L0_CADOUT_L1 AC3L0_

32、CADOUT_H0 AD1L0_CADOUT_L0 AC1L0_CLKIN_H1J5L0_CLKIN_L1K5L0_CLKIN_H0J3L0_CLKIN_L0J2L0_CTLIN_H1P3L0_CTLIN_L1P4L0_CTLIN_H0N1L0_CTLIN_L0P1L0_CLKOUT_H1 Y4L0_CLKOUT_L1 Y3L0_CLKOUT_H0 Y1L0_CLKOUT_L0 W1L0_CTLOUT_H1 T5L0_CTLOUT_L1 R5L0_CTLOUT_H0 R2L0_CTLOUT_L0 R3C7274.7U_0805_10V4ZPUMA12C6664.7U_0805_10V4ZPUM

33、A12C668180P_0402_50V8J12C7250.22U_0603_16V4Z12C722180P_0402_50V8J12AABBCCDDEE1 12 23 34 4DDRB_SMA10DDRB_SMA7DDRB_SMA1DDRB_SMA12DDRB_SMA6DDRB_SMA11DDRB_SMA0DDRB_SMA9DDRB_SMA15DDRB_SMA3DDRB_SMA5DDRB_SMA8DDRB_SMA13DDRB_SMA2DDRB_SMA4DDRB_CKE1DDRB_SDQ0DDRB_CKE0DDRB_SDQS6DDRB_SDQS6#DDRB_SDQS2DDRB_SDQS2#DD

34、RB_SDQS5DDRB_SDQS5#DDRB_SDQS1DDRB_SDQS1#DDRB_SDQS4DDRB_SDQS4#DDRB_SDQS0DDRB_SDQS0#DDRB_SDQS7DDRB_SDQS7#DDRB_SDQS3DDRB_SDQS3#DDRA_CLK1DDRA_CLK1#DDRB_CLK0DDRB_CLK0#DDRB_CLK1DDRB_CLK1#DDRA_SDQS0DDRA_SDQS0#DDRA_SDQS3DDRA_SDQS3#DDRA_SDQS2DDRA_SDQS2#DDRA_SDQS1DDRA_SDQS1#DDRA_SDQS4DDRA_SDQS4#DDRA_SDQS5DDRA

35、_SDQS5#DDRA_SDQS6DDRA_SDQS6#DDRA_SDQS7#DDRA_SDQS7DDRA_CLK0DDRA_CLK0#+MCH_REFDDRB_ODT0DDRB_ODT1DDRA_ODT1DDRA_ODT0DDRB_CLK0#DDRB_CLK0DDRB_CLK1DDRB_CLK1#DDRA_CLK1#DDRA_CLK0#DDRA_CLK0DDRA_CLK1DDRA_CKE0DDRA_CKE1DDRB_SDM6DDRB_SDM4DDRB_SDM2DDRB_SDM0DDRB_SDM5DDRB_SDM3DDRB_SDM1DDRB_SDM7DDRA_SDM6DDRA_SDM5DDRA

36、_SDM4DDRA_SDM3DDRA_SDM2DDRA_SDM1DDRA_SDM0DDRA_SDM7DDRA_SDQ3DDRA_SDQ4DDRA_SDQ0DDRA_SDQ1DDRA_SDQ2DDRB_SRAS#DDRB_SCAS#DDRB_SWE#DDRB_SBS0#DDRB_SBS1#DDRB_SBS2#DDRA_SWE#DDRA_SCAS#DDRA_SRAS#DDRA_SBS2#DDRA_SBS1#DDRA_SBS0#DDRA_SMA15DDRA_SMA12DDRA_SMA14DDRA_SMA13DDRA_SMA11DDRA_SMA10DDRA_SMA6DDRA_SMA1DDRA_SMA7

37、DDRA_SMA2DDRA_SMA3DDRA_SMA8DDRA_SMA5DDRA_SMA4DDRA_SMA9DDRA_SMA0DDRB_SMA14DDRA_SCS1# DDRB_SCS0#DDRB_SCS1#DDRA_SCS0#+MCH_REFDDRA_SDQ5DDRA_SDQ6DDRA_SDQ7DDRA_SDQ8DDRA_SDQ9DDRA_SDQ10DDRA_SDQ11DDRA_SDQ12DDRA_SDQ13DDRA_SDQ14DDRA_SDQ15DDRA_SDQ16DDRA_SDQ17DDRA_SDQ18DDRA_SDQ19DDRA_SDQ20DDRA_SDQ21DDRA_SDQ22DDR

38、A_SDQ23DDRA_SDQ24DDRA_SDQ25DDRA_SDQ26DDRA_SDQ27DDRA_SDQ28DDRA_SDQ29DDRA_SDQ30DDRA_SDQ31DDRA_SDQ32DDRA_SDQ33DDRA_SDQ34DDRA_SDQ35DDRA_SDQ36DDRA_SDQ37DDRA_SDQ38DDRA_SDQ39DDRA_SDQ40DDRA_SDQ41DDRA_SDQ42DDRA_SDQ43DDRA_SDQ44DDRA_SDQ45DDRA_SDQ46DDRA_SDQ47DDRA_SDQ48DDRA_SDQ49DDRA_SDQ50DDRA_SDQ51DDRA_SDQ52DDR

39、A_SDQ53DDRA_SDQ54DDRA_SDQ55DDRA_SDQ56DDRA_SDQ57DDRA_SDQ58DDRA_SDQ59DDRA_SDQ60DDRA_SDQ61DDRA_SDQ62DDRA_SDQ63DDRB_SDQ1DDRB_SDQ2DDRB_SDQ3DDRB_SDQ4DDRB_SDQ5DDRB_SDQ6DDRB_SDQ7DDRB_SDQ8DDRB_SDQ9DDRB_SDQ10DDRB_SDQ11DDRB_SDQ12DDRB_SDQ13DDRB_SDQ14DDRB_SDQ15DDRB_SDQ16DDRB_SDQ17DDRB_SDQ18DDRB_SDQ19DDRB_SDQ20DD

40、RB_SDQ21DDRB_SDQ22DDRB_SDQ23DDRB_SDQ24DDRB_SDQ25DDRB_SDQ26DDRB_SDQ27DDRB_SDQ28DDRB_SDQ29DDRB_SDQ30DDRB_SDQ31DDRB_SDQ32DDRB_SDQ33DDRB_SDQ34DDRB_SDQ35DDRB_SDQ36DDRB_SDQ37DDRB_SDQ38DDRB_SDQ39DDRB_SDQ40DDRB_SDQ41DDRB_SDQ42DDRB_SDQ43DDRB_SDQ44DDRB_SDQ45DDRB_SDQ46DDRB_SDQ47DDRB_SDQ48DDRB_SDQ49DDRB_SDQ50DD

41、RB_SDQ51DDRB_SDQ52DDRB_SDQ53DDRB_SDQ54DDRB_SDQ55DDRB_SDQ56DDRB_SDQ57DDRB_SDQ58DDRB_SDQ59DDRB_SDQ60DDRB_SDQ61DDRB_SDQ62DDRB_SDQ63VTT_SENSEDDRB_CKE1 9DDRB_CKE0 9DDRA_SCS0#8DDRA_SCS1#8 DDRB_SCS0# 9DDRB_SCS1# 9DDRB_SDQ6309DDRB_SDM709 DDRA_SDM70 8DDRA_SDQ630 8DDRB_SDQS79DDRB_SDQS7#9DDRB_SDQS69DDRB_SDQS59

42、DDRB_SDQS49DDRB_SDQS39DDRB_SDQS29DDRB_SDQS19DDRB_SDQS09DDRB_SDQS6#9DDRB_SDQS5#9DDRB_SDQS4#9DDRB_SDQS3#9DDRB_SDQS2#9DDRB_SDQS1#9DDRB_SDQS0#9DDRA_SDQS3 8DDRA_SDQS2 8DDRA_SDQS1 8DDRA_SDQS0 8DDRA_SDQS3# 8DDRA_SDQS2# 8DDRA_SDQS1# 8DDRA_SDQS0# 8DDRA_SDQS4 8DDRA_SDQS4# 8DDRA_SDQS5 8DDRA_SDQS5# 8DDRA_SDQS6

43、8DDRA_SDQS6# 8DDRA_SDQS7 8DDRA_SDQS7# 8DDRB_SRAS# 9DDRB_SCAS# 9DDRB_SWE# 9DDRB_SBS0# 9DDRB_SBS1# 9DDRB_SBS2# 9DDRA_SRAS#8DDRA_SCAS#8DDRA_SWE#8DDRA_SBS0#8DDRA_SBS1#8DDRA_SBS2#8DDRA_SMA1508 DDRB_SMA150 9DDRB_ODT0 9DDRB_ODT1 9DDRA_ODT08DDRA_ODT18DDRB_CLK0 9DDRB_CLK0# 9DDRB_CLK1 9DDRB_CLK1# 9DDRA_CLK08D

44、DRA_CLK0#8DDRA_CLK18DDRA_CLK1#8DDRA_CKE08DDRA_CKE18+1.8V+0.9V+0.9V+1.8VTitleSize Document Number RevDate: Sheet ofSecurity Classification Compal Secret DataTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION.

45、 THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.Iss

46、ued Date Deciphered DateKBLG0 LA-4921P 0.1AMD CPU S1G2 DDRII I/FCustom5 57Thursday, February 19, 20092008/10/06 2009/10/06Compal Electronics, Inc.PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCHPlace them close to CPU within 1“Processor DDR2 Memory InterfaceVTT=0.75AC3791.5P_0402_50V9C12MEM:DATAJCPU1C609002

47、2100G_BconnMB_DATA63AD11MB_DATA62AF11MB_DATA61AF14MB_DATA60AE14MB_DATA59Y11MB_DATA58AB11MB_DATA57AC12MB_DATA56AF13MB_DATA55AF15MB_DATA54AF16MB_DATA53AC18MB_DATA52AF19MB_DATA51AD14MB_DATA50AC14MB_DATA49AE18MB_DATA48AD18MB_DATA47AD20MB_DATA46AC20MB_DATA45AF23MB_DATA44AF24MB_DATA43AF20MB_DATA42AE20MB_D

48、ATA41AD22MB_DATA40AC22MB_DATA39AE25MB_DATA38AD26MB_DATA37AA25MB_DATA36AA26MB_DATA35AE24MB_DATA34AD24MB_DATA33AA23MB_DATA32AA24MB_DATA31G24MB_DATA30G23MB_DATA29D26MB_DATA28C26MB_DATA27G26MB_DATA26G25MB_DATA25E24MB_DATA24E23MB_DATA23C24MB_DATA22B24MB_DATA21C20MB_DATA20B20MB_DATA19C25MB_DATA18D24MB_DAT

49、A17A21MB_DATA16D20MB_DATA15D18MB_DATA14C18MB_DATA13D14MB_DATA12C14MB_DATA11A20MB_DATA10A19MB_DATA9A16MB_DATA8A15MB_DATA7A13MB_DATA6D12MB_DATA5E11MB_DATA4G11MB_DATA3B14MB_DATA2A14MB_DATA1A11MB_DATA0C11MA_DATA63 AA12MA_DATA62 AB12MA_DATA61 AA14MA_DATA60 AB14MA_DATA59 W11MA_DATA58 Y12MA_DATA57 AD13MA_DATA56 AB13MA_DATA55 AD15MA_DATA54 AB15MA_DATA53 AB17MA_DATA52 Y17MA_DATA51 Y14MA_DATA50 W14MA_DATA49 W16MA_DATA48 AD17MA_DATA47 Y18MA_DATA46 AD19MA_DATA45 AD21MA_DATA44 AB21MA_DATA43 AB18MA_DATA42 AA18MA_DATA41 AA20MA_DATA40 Y20MA_DATA39 AA22MA_DATA38 Y2

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