1、1. PSK 调制电路的建模library ieee;use ieee.std_logic_arith.all;use ieee.std_logic_1164.all;use ieee.std_logic_unsigned.all;entity PL_CPSK isport(clk:in std_logic;start:in std_logic;x:in std_logic;y:out std_logic);end PL_CPSK;architecture behav of PL_CPSK issignal q:std_logic_vector(1 downto 0);signal f1,f2
2、:std_logic;beginprocess(clk)beginif clkevent and clk=1 thenif start=0 then q=“00“;elsif q=“01“ then f1=1;f2=0;q=q+1;elsif q=“11“ then f1=0;f2=1;q=“00“;else f1=0;f2=1;q=q+1;end if;end if;end process;process(clk,x)beginif clkevent and clk=1 thenif q(0)=1 thenif x=1 then y=f1;else y=f2;end if;end if;en
3、d if;end process;end behav;2CPSK 解调library ieee;use ieee.std_logic_arith.all;use ieee.std_logic_1164.all;use ieee.std_logic_unsigned.all;entity PL_CPSK2 isport(clk:in std_logic;start:in std_logic;x:in std_logic;y:out std_logic);end PL_CPSK2;architecture behav of PL_CPSK2 issignal q:integer range 0 t
4、o 3;beginprocess(clk)beginif clkevent and clk=1 thenif start=0 then q=0;elsif q=0 then q=q+1;if x=1 then y=1;else y=0;end if;elsif q=3 then q=0;else q=q+1;end if;end if;end process;end behav;3. DPSK 调制绝对码到相对码library ieee;use ieee.std_logic_arith.all;use ieee.std_logic_1164.all;use ieee.std_logic_uns
5、igned.all;entity PL_DPSK isport(clk:in std_logic;start:in std_logic;x:in std_logic;y:out std_logic);end PL_DPSK;architecture behav of PL_DPSK issignal q:integer range 0 to 3;signal xx:std_logic;beginprocess(clk,x)beginif clkevent and clk=1 thenif start=0 then q=0;xx=0;elsif q=0 then q=1;xx=xx xor x;
6、y=xx xor x;elsif q=3 then q=0;else q=q+1;end if;end if;end process;end behav;4DPSK 解调相对码到绝对码library ieee;use ieee.std_logic_arith.all;use ieee.std_logic_1164.all;use ieee.std_logic_unsigned.all;entity PL_DPSK2 isport(clk:in std_logic;start:in std_logic;x:in std_logic;y:out std_logic);end PL_DPSK2;architecture behav of PL_DPSK2 issignal q:integer range 0 to 3;signal xx:std_logic;beginprocess(clk,x)beginif clkevent and clk=1 thenif start=0 then q=0;elsif q=0 then q=1;elsif q=3 then q=0;y=xx xor x;xx=x;else q=q+1;end if;end if;end process;end behav;